Tegra: support for System Suspend using sc7entry-fw binary
This patch adds support to enter System Suspend on Tegra210 platforms
without the traditional BPMP firmware. The BPMP firmware will no longer
be supported on Tegra210 platforms and its functionality will be
divided across the CPU and sc7entry-fw.

The sc7entry-fw takes care of performing the hardware sequence required
to enter System Suspend (SC7 power state) from the COP. The CPU is required
to load this firmware to the internal RAM of the COP and start the sequence.
The CPU also make sure that the COP is off after cold boot and is only
powered on when we want to start the actual System Suspend sequence.

The previous bootloader loads the firmware to TZDRAM and passes its base and
size as part of the boot parameters. The EL3 layer is supposed to sanitize
the parameters before touching the firmware blob.

To assist the warmboot code with the PMIC discovery, EL3 is also supposed to
program PMC's scratch register #210, with appropriate values. Without these
settings the warmboot code wont be able to get the device out of System
Suspend.

Change-Id: I5a7b868512dbfd6cfefd55acf3978a1fd7ebf1e2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
1 parent 93e3b0f commit 3ca3c27cad16342e5f2b76511aa2e1d9cdb151a6
@Varun Wadekar Varun Wadekar authored on 27 Feb 2018
Showing 8 changed files
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plat/nvidia/tegra/common/drivers/flowctrl/flowctrl.c
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plat/nvidia/tegra/common/tegra_bl31_setup.c
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plat/nvidia/tegra/include/drivers/flowctrl.h
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plat/nvidia/tegra/include/drivers/pmc.h
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plat/nvidia/tegra/include/t210/tegra_def.h
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plat/nvidia/tegra/include/tegra_private.h
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plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
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plat/nvidia/tegra/soc/t210/plat_setup.c