Tegra: rename secure scratch register macros
This patch renames all the secure scratch registers to reflect their usage. This is a list of all the macros being renamed: - SECURE_SCRATCH_RSV1_* -> SCRATCH_RESET_VECTOR_* - SECURE_SCRATCH_RSV6 -> SCRATCH_SECURE_BOOTP_FCFG - SECURE_SCRATCH_RSV11_* -> SCRATCH_SMMU_TABLE_ADDR_* - SECURE_SCRATCH_RSV53_* -> SCRATCH_BOOT_PARAMS_ADDR_* - SECURE_SCRATCH_RSV55_* -> SCRATCH_TZDRAM_ADDR_* NOTE: Future SoCs will have to define these macros to keep the drivers functioning. Change-Id: Ib3ba40dd32e77b92b47825f19c420e6fdfa8b987 Signed-off-by: Steven Kao <skao@nvidia.com> |
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plat/nvidia/tegra/common/drivers/smmu/smmu.c |
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plat/nvidia/tegra/include/t186/tegra_def.h |
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plat/nvidia/tegra/soc/t186/plat_memctrl.c |
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plat/nvidia/tegra/soc/t186/plat_psci_handlers.c |
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plat/nvidia/tegra/soc/t186/plat_secondary.c |
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plat/nvidia/tegra/soc/t186/plat_setup.c |
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