Tegra210: support for cluster idle from the CPU
This patch adds support to enter/exit to/from cluster idle power state on Tegra210 platforms that do not load BPMP firmware. The CPU initates the cluster idle sequence on the last standing CPU, by following these steps: Entry ----- * stop other CPUs from waking up * program the PWM pinmux to tristate for OVR PMIC * program the flow controller to enter CC6 state * skip L1 $ flush during cluster power down, as L2 $ is inclusive of L1 $ on Cortex-A57 CPUs Exit ---- * program the PWM pinmux to un-tristate for OVR PMIC * allow other CPUs to wake up This patch also makes sure that cluster idle state entry is not enabled until CL-DVFS is ready. Change-Id: I54cf31bf72b4a09d9bf9d2baaed6ee5a963c7808 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
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plat/nvidia/tegra/include/t210/tegra_def.h |
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plat/nvidia/tegra/soc/t210/plat_psci_handlers.c |
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plat/nvidia/tegra/soc/t210/platform_t210.mk |
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