Browse code plat: intel: Add BL2 support for Stratix 10 SoC This adds BL2 support for Intel Stratix 10 SoC FPGA. Functionality includes: - Release and setup peripherals from reset - Calibrate DDR - ECC DDR Scrubbing - Load FIP (bl31 and bl33) Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com> WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2 v2.1-rc1 v2.1-rc0 v2.1

1 parent f0bfe15 commit 9d82ef26c657fda9ee21806817c7a16547b0b605 Loh Tien Hock authored on 4 Feb 2019

Showing 26 changed files

• maintainers.rst
• plat/intel/soc/stratix10/aarch64/plat_helpers.S
• plat/intel/soc/stratix10/aarch64/platform_common.c
• plat/intel/soc/stratix10/aarch64/stratix10_private.h
• plat/intel/soc/stratix10/bl2_plat_mem_params_desc.c
• plat/intel/soc/stratix10/bl2_plat_setup.c
• plat/intel/soc/stratix10/include/plat_macros.S
• plat/intel/soc/stratix10/include/platform_private.h
• plat/intel/soc/stratix10/include/s10_clock_manager.h
• plat/intel/soc/stratix10/include/s10_handoff.h
• plat/intel/soc/stratix10/include/s10_memory_controller.h
• plat/intel/soc/stratix10/include/s10_noc.h
• plat/intel/soc/stratix10/include/s10_pinmux.h
• plat/intel/soc/stratix10/include/s10_reset_manager.h
• plat/intel/soc/stratix10/include/s10_system_manager.h
• plat/intel/soc/stratix10/plat_delay_timer.c
• plat/intel/soc/stratix10/plat_storage.c
• plat/intel/soc/stratix10/platform.mk
• plat/intel/soc/stratix10/platform_def.h
• plat/intel/soc/stratix10/soc/s10_clock_manager.c
• plat/intel/soc/stratix10/soc/s10_handoff.c
• plat/intel/soc/stratix10/soc/s10_memory_controller.c
• plat/intel/soc/stratix10/soc/s10_pinmux.c
• plat/intel/soc/stratix10/soc/s10_reset_manager.c
• plat/intel/soc/stratix10/soc/s10_system_manager.c
• plat/intel/soc/stratix10/stratix10_image_load.c

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