Tegra210B01: SE1 and SE2/PKA1 context save (atomic)
This patch adds the implementation of the SE atomic context save
sequence. The atomic context-save consistently saves to the TZRAM
carveout; thus there is no need to declare context save buffer or
map MMU region in TZRAM for context save. The atomic context-save
routine is responsible to validate the context-save progress
counter, where CTX_SAVE_CNT=133(SE1)/646(SE2), and the SE error
status to ensure the context save procedure complete successfully.

Change-Id: Ic80843902af70e76415530266cb158f668976c42
Signed-off-by: Marvin Hsu <marvinh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
1 parent 1d49112 commit ce3c97c95b20f02f60cae5dc17b08b3c74615a74
@Marvin Hsu Marvin Hsu authored on 10 Apr 2017
Varun Wadekar committed on 16 Jan 2019
Showing 7 changed files
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plat/nvidia/tegra/include/drivers/security_engine.h 0 → 100644
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plat/nvidia/tegra/include/t210/tegra_def.h
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plat/nvidia/tegra/soc/t210/drivers/se/se_private.h 0 → 100644
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plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c 0 → 100644
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plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
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plat/nvidia/tegra/soc/t210/plat_setup.c
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plat/nvidia/tegra/soc/t210/platform_t210.mk