GitBucket
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intel: Platform common code refactor
Pull out common code from agilex and stratix10 Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Iddc0a9e6eccb30823d7b15615d5ce9c6bedb2abc |
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| plat/intel/soc/agilex/bl2_plat_mem_params_desc.c 100644 → 0 |
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| plat/intel/soc/agilex/platform.mk |
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| plat/intel/soc/agilex/socfpga_delay_timer.c 100644 → 0 |
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| plat/intel/soc/agilex/socfpga_image_load.c 100644 → 0 |
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| plat/intel/soc/agilex/socfpga_topology.c 100644 → 0 |
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| plat/intel/soc/common/bl2_plat_mem_params_desc.c 0 → 100644 |
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| plat/intel/soc/common/socfpga_delay_timer.c 0 → 100644 |
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| plat/intel/soc/common/socfpga_image_load.c 0 → 100644 |
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| plat/intel/soc/common/socfpga_topology.c 0 → 100644 |
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| plat/intel/soc/stratix10/bl2_plat_mem_params_desc.c 100644 → 0 |
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| plat/intel/soc/stratix10/plat_delay_timer.c 100644 → 0 |
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| plat/intel/soc/stratix10/plat_topology.c 100644 → 0 |
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| plat/intel/soc/stratix10/platform.mk |
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| plat/intel/soc/stratix10/stratix10_image_load.c 100644 → 0 |
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