Apply stricter speculative load restriction ...

The SCTLR.DSSBS bit is zero by default thus disabling speculative loads.
However, we also explicitly set it to zero for BL2 and TSP images when
each image initialises its context. This is done to ensure that the
image environment is initialised in a safe state, regardless of the
reset value of the bit.

Change-Id: If25a8396641edb640f7f298b8d3309d5cba3cd79
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

allwinner: regulators: pick correct DT subnode ...

So far the DT node describing the AXP803 PMIC used in many Allwinner A64
boards had only one subnode, so our code just entering the first subnode
to find all regulators worked fine.

However recent DT updates in the Linux kernel add more subnodes *before*
that, so we need to make sure to explicitly enter the "regulators"
subnode to find the information we are after.

Improve some DT node parsing error handling on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Fixup register handling in aarch32 reset_handler ...

The BL handover interface stores the bootloader arguments in
registers r9-r12, so when the reset_handler stores the lr pointer
in r10 it clobers one of the arguments.

Adapt to use r8 and adapt the comment about registers allowed
to clober.

I've checked aarch32 reset_handlers and none seem to use higher
registers as far as I can tell.

Fixes: a6f340fe58b9 ("Introduce the new BL handover interface")
Cc: Soby Mathew <soby.mathew@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

zynqmp: pm: Add support for setting PMU configuration object ...

Allow EL2 (e.g. U-Boot) to load the configuration object at runtime
into the Xilinx ZynqMP PMU firmware. This allows booting with U-Boot
and U-Boot SPL with PMU FW without hard-coding the configuration
object.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>

Merge pull request #1867 from AlexeiFedorov/af/enable_ptrauth_warm_boot ...

BL31: Enable pointer authentication support in warm boot path

Merge pull request #1870 from thloh85-intel/s10_mmc ...

plat: intel: Add MMC OCR voltage information for initialization

Merge pull request #1863 from thloh85-intel/mmc_fixes ...

drivers: mmc: Fix some issues with MMC stack

plat: intel: Add MMC OCR voltage information for initialization ...

MMC stack needs OCR voltage information for the platform to initialize
MMC controller correctly.

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

plat: intel: Add MMC OCR voltage information for initialization ...

MMC stack needs OCR voltage information for the platform to initialize
MMC controller correctly.

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

Merge pull request #1864 from hadi-asyrafi/mailbox_fix ...

intel: Mailbox service un-accessible

Merge pull request #1862 from thloh85-intel/s10_bl2 ...

plat: intel: Improve ECC scrubbing performance

Merge pull request #1868 from Yann-lms/zeromem_device_info ...

stm32mp1: zeromem device_info struct

Merge pull request #1869 from pbeesley-arm/pb/wiki-import ...

Pb/wiki import

doc: Add and correct headings for imported files ...

Some files imported from the wiki are missing RST section headers and
other files are using inconsistent characters for the same header level.

Change-Id: I318c843f9bc8fb40074ef90827b9acac06463662
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Add missing CVE links to advisories ...

Some security advisories did not contain a direct link to the CVE page
on mitre.org.

Change-Id: I80f8f27a25da3a76b564a3e49cafe5e253379f37
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Update links within imported wiki content ...

This patch covers two changes:

- Links that refer to GitHub are updated to point to the
  relevant content on trustedfirmware.org

- Internal links between documents have been updated,
  with the required .rst suffix being added or due
  to a change in the relative locations of the files.

Change-Id: Ibf87da7d2ece726d1c94a9b33a2bbc3129de7779
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Migrate a subset of the GitHub wiki content ...

With the TF wiki being migrated from GitHub to trustedfirmware.org,
some documents will be moved into the docs/ directory within the
repository rather than remaining as external content. The
appropriate action has been decided on a per-document basis.

Change-Id: Id0f615f3418369256f30d2e34e354a115389d105
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

BL31: Enable pointer authentication support in warm boot path ...

In the current Pointer Authentication support added in
commit b86048c
PAuth gets enabled in BL31 cold boot entrypoint only,
(see bl31_entrypoint() in bl31\aarch64\bl31_entrypoint.S)
but not in bl31_warm_entrypoint().
This results in EnIA bit [31] in SCTLR_EL3 not being set
and pointer authentication disabled after CPU wake-up event.

Fixes ARM-software/tf-issues#684

Change-Id: I27a67804764dfba2a6d72ca119ca2bcff4f536d6
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

Merge pull request #1860 from pbeesley-arm/pb/todo-cleanup ...

doc: Remove todo from example code

stm32mp1: zeromem device_info struct ...

The change of the structure highlighted the fact that all fields are not
correctly initialized with zeroes.

Replace the other memset in the function with zeromem, as it is faster.

Change-Id: I27f45a64e34637f79fa519f486bf5936721ef396
Signed-off-by: Yann Gautier <yann.gautier@st.com>

intel: Mailbox service un-accessible ...

Change map region for device 2 from non-secure to secure

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>

drivers: mmc: Fix some issues with MMC stack ...

Some bugs in MMC stack needs to be fixed:
- scr cannot be local as this will cause cache issue when invalidating
after the read DMA transfer is completed
- ACMD41 needs to send voltage information in initialization, otherwise the
command is a query, thus will not initialize the controller
- when checking device state, retry until the retries counter goes to zero
before failing

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

plat: intel: Improve ECC scrubbing performance ...

We should be using zeromem to scrub memory instead of memset. This would
improve the performance by 200x

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

Remove todo from example code ...

Keeping that in the docs is a bit untidy

Change-Id: Ia95246208cee48df1536b4317a8c896ab2c84fc2
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Merge pull request #1847 from jts-arm/mbedtls ...

Remove Mbed TLS dependency from plat_bl_common.c

Merge pull request #1855 from dp-arm/dp/ssbs ...

Ensure proper ID register is checked for feature detection

Merge pull request #1853 from vwadekar/dummy_io_storage ...

Tegra: dummy support for the io_storage backend

Merge pull request #1854 from marex/arm/master/atf-v2.0.1 ...

Arm/master/atf v2.0.1

Merge pull request #1852 from sandrine-bailleux-arm/sb/fix-intmgt-doc ...

Minor fixes in the interrupt framework design guide

Ensure proper ID register is checked for feature detection ...

SSBS support is determined by checking ID_AA64PFR1_EL1 and not
ID_AA64PFR0_EL1.

Fixes ARM-Software/tf-issues#679

Change-Id: I8ecba13b850995ec6a6ede3c2a1e02e69a3a95db
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>