Merge pull request #980 from dp-arm/dp/make-fix ...

tools: Use exported quiet flag from top-level Makefile

Merge pull request #981 from soby-mathew/sm/cov_scmi ...

Fix coverity error in CSS SCMI driver

Merge pull request #985 from hzhuang1/remove_mailbox ...

hikey960: remove mailbox driver

CSS:Fix scpi "get_power_state" when ARM_PLAT_MT is set ...

The ARM_PLAT_MT bit enables the support for MT bit in
MPIDR format. This means that the level 0 affinity
represents the thread and CPU / Cluster levels are
at affinity level 1 and 2 respectively.
This was not catered for in the scpi 'css_scp_get_power_state, API.
Since the SCPI driver can only cater for single threaded CPUs,
this patch fixes the problem by catering for this shift by
effectively ignoring the Thread (level 0) affinity level.

Change-Id: If44f55c9fb2773c8d3f8a9bbcf5420a6f7409dfe
Signed-off-by: jagadeesh ujja <jagadeesh.ujja@arm.com>

hikey960: remove mailbox driver ...

Since this mailbox driver is abandoned, remove it.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

uniphier: fix memory over-run bug ...

Check the array index before the write.  This issue was found by a
static analysis tool.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Tegra186: mce: fix MISRA defects ...

Main fixes:

* Added explicit casts (e.g. 0U) to integers in order for them to be
  compatible with whatever operation they're used in [Rule 10.1]
* Force operands of an operator to the same type category [Rule 10.4]
* Added curly braces ({}) around if/while statements in order to
  make them compound [Rule 15.6]
* Added parentheses [Rule 12.1]
* Voided non C-library functions whose return types are not used [Rule 17.7]

Change-Id: I91404edec2e2194b1ce2672d2a3fc6a1f5bf41f1
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: delay_timer: fix MISRA defects ...

Main fixes:

* Include header file for function declarations [Rule 8.4]
* Move global object into function [Rule 8.9]

Change-Id: I1bc9f3f0ebd4ffc0b8444ac856cd97b0cb56bda4
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>

Tegra: gic: fix MISRA defects ...

Main fixes:

* Use int32_t replace int, use uint32_t replace unsign int [Rule 4.6]
* Added explicit casts (e.g. 0U) to integers in order for them to be
  compatible with whatever operation they're used in [Rule 10.1]
* Force operands of an operator to the same type category [Rule 10.4]
* Fixed assert/if statements conditions to be essentially boolean [Rule 14.4]
* Added curly braces ({}) around if statements in order to
  make them compound [Rule 15.6]
* Convert macros form headers to unsigned ints

Change-Id: I8051cc16499cece2039c9751bd347645f40f0901
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: fiq_glue: fix MISRA defects ...

Main fixes:

* Added explicit casts (e.g. 0U) to integers in order for them to be
  compatible with whatever operation they're used in [Rule 10.1]

* Convert object type to match the type of function parameters
  [Rule 10.3]

* Added curly braces ({}) around if statements in order to
  make them compound [Rule 15.6]

* Expressions resulting from the expansion of macro parameters
  shall be enclosed in parentheses[Rule 20.7]

Change-Id: I5cf83caafcc1650b545ca731bf3eb8f0bfeb362b
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>

Tegra: pmc: fix defects flagged during MISRA analysis ...

Main fixes:

* Fixed if/while statement conditional to be essentially boolean [Rule 14.4]

* Added curly braces ({}) around if/for/while statements in order to
  make them compound [Rule 15.6]

* Added explicit casts (e.g. 0U) to integers in order for them to be
  compatible with whatever operation they're used in [Rule 10.1]

Change-Id: Ic72b248aeede6cf18bf85051188ea7b8fd8ae829
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>

Tegra: memctrl: check GPU reset state from common place ...

This patch moves the GPU reset state check, during VideoMem resize, to the
common SiP handler, to reduce code duplication.

Change-Id: I3818c5f104b809da83dc2a61d6a8149606f81c13
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: memctrl_v2: fix software logic to check "flush complete" ...

This patch fixes the logic to check if the command written to the
MC_CLIENT_HOTRESET_CTRLx registers, was accepted by the hardware module.

Change-Id: If94fff9424555cb4688042eda17b4b20f4eb399a
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: add explicit casts for integer macros ...

This patch adds explicit casts (U(x)) to integers in the tegra_def.h
headers, to make them compatible with whatever operation they're used
in [MISRA-C Rule 10.1]

Change-Id: Ic5fc611aad986a2c6e6e6f625e0753ab9b69eb02
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

include: add U()/ULL() macros for constants ...

This patch uses the U() and ULL() macros for constants, to fix some
of the signed-ness defects flagged by the MISRA scanner.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Add U() macro to share constants between C and other sources ...

This patch adds the U(_x) macros to utils_def.h to allow constants to
be shared between C and other sources.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Unique names for defines in the CPU libraries ...

This patch makes all the defines in the CPU libraries unique,
by prefixing them with the CPU name.

NOTE: PLATFORMS USING THESE MACROS WILL HAVE TO UPDATE THEIR CODE
TO START USING THE UPDATED NAMES

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: enable 'signed-comparison' compilation warning/errors ...

This patch enables the 'sign-compare' flag, to enable warning/errors
for comparisons between signed/unsigned variables. The warning has
been enabled for all the Tegra platforms, to start with.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Merge pull request #979 from soby-mathew/sm/aarch32_macro_fix ...

Fix stdlib defines for AArch32

Merge pull request #974 from masahir0y/uniphier ...

UniPhier Initial Support

Merge pull request #982 from hzhuang1/fix_hikey960 ...

Fix hikey960

hikey960: fix the calculation in boardid ...

Since the type of ADC value is always unsigned int, don't
need to check the value with negative value.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

ufs: fix the and operator ...

Should use AND (&), not &&.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

uniphier: add TSP support ...

Add TSP to test BL32 without relying on external projects.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

uniphier: support Socionext UniPhier platform ...

Initial commit for Socionext UniPhier SoC support.  BL1, Bl2, and
BL31 are supported.  Refer to docs/plat/socionext-uniphier.md for
more detais.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

tools: Use exported quiet flag from top-level Makefile ...

When V is set from the command line, the value is passed to the tools'
Makefiles as well.

Change-Id: I91a1f66de5c1ae6f36b6c9f0a9bd550d4a30f092
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

Fix coverity error in CSS SCMI driver ...

Change-Id: Ia7d731f429e452e4bc9f9a553d7105b6394c621c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Fix stdlib defines for AArch32 ...

Some of the macro defines in the header files of `include/lib/stdlib/machine/`
folder are not correct for AArch32. This patch fixes the same.

Change-Id: I8bfaf638a7986fd902648d2074537bd26c313cb3
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Merge pull request #972 from achingupta/ag/freebsd-dt-change ...

Device tree changes to boot FreeBSD on FVPs

Merge pull request #971 from Xilinx/tegra ...

tegra: Fix build errors