Sanitise includes across codebase ...

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Reorganize architecture-dependent header files ...

The architecture dependant header files in include/lib/${ARCH} and
include/common/${ARCH} have been moved to /include/arch/${ARCH}.

Change-Id: I96f30fdb80b191a51448ddf11b1d4a0624c03394
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/arm: Always define TSP memory region ...

Even though this is not used unless SPD=tspd, only defining it when
SPD_tspd is defined doesn't have any advantage and it makes it harder to
read the code.

Change-Id: I3d93135e05f39be071d16f8a47394a9a3ff54bc8
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1731 from miyatsu/doc-fix-20181225 ...

docs: marvell: Fix typo in file build.txt

Merge pull request #1728 from satheesbalya-arm/sb1/sb1_2497_v84_dit ...

Enable DIT if supported

Enable DIT if supported ...

This patch enables the Data Independent Timing
functionality (DIT) in EL3 if supported
by the platform.

Change-Id: Ia527d6aa2ee88a9a9fe1c941220404b9ff5567e5
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

docs: marvell: Fix typo in file build.txt ...

Replace "SECURE=0" with "MARVELL_SECURE_BOOT=0".

Signed-off-by: Ding Tao <miyatsu@qq.com>

Merge pull request #1730 from antonio-nino-diaz-arm/an/spdx ...

Use SPDX identifier in checkpatch config file

Use SPDX identifier in checkpatch config file ...

Change-Id: I4113604ac69ba07bd90d8268be65cae8aa43138e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1725 from Yann-lms/clang_aarch32 ...

clang: 32 bit compilation should include march32-directive

Merge pull request #1727 from antonio-nino-diaz-arm/an/gitignore ...

gitignore: Ignore sptool and doimage binaries

Merge pull request #1729 from vwadekar/tegra-native-gicv2 ...

Tegra native gicv2

Tegra: support for native GICv2 drivers ...

This patch converts Tegra platforms to support native
GICv2 drivers. This involves removes Tegra's GIC driver
port platforms to use interrupt_props

Change-Id: I83d8a690ff276dd97928dc60824a4fd36999bb30
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: support to compile native GICv2 drivers ...

This patch adds a macro to allow platforms to compile native
GICv2 drivers along with Tegra handlers.

Change-Id: I8281796c09dae5704cff2daab831395d65e261b7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

gitignore: Ignore sptool and doimage binaries ...

Change-Id: I119b85179f68148e128cc194f11d2cccb1e33d6d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1721 from marex/arm/master/memsize-passing-v2 ...

plat: rcar: Move FDT from x3 to x1

Merge pull request #1717 from satheesbalya-arm/sb1/sb1_2629_romlib_ifc ...

romlib: Add platform specific jump table list

romlib: Add platform specific jump table list ...

This patch allows platforms to define their
own jump table list for library at ROM. The
file has the list of functions to be used
from library at ROM. It can also include
other list files.

Change-Id: I721c35d7dad3dcadbb3a7f3277bfd5d3e1f6e00a
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

Merge pull request #1722 from antonio-nino-diaz-arm/an/arch ...

Synchronize architectural headers with TF-A-Tests

Import exception helpers from TF-A-Tests ...

This is done in order to keep the files in both repositories in sync.

Change-Id: Ie1a9f321cbcfe8d7d14f206883fa718872271218
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Deprecate some unused AArch64 assembly functions ...

Change-Id: I8a0be21783a0c12325e6ab22e9e53ab5466ed9e0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Move helpers from arch.h to arch_helpers.h ...

Some of the affected macros can only be used from C code. In general, we
use arch_helpers.h for any C helpers to access registers. For
consistency, the other macros have been moved as well.

Also, import some AArch32 helpers from TF-A-Tests.

Change-Id: Ie8fe1ddeadba5336c12971ddc39a7883121386b1
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1718 from vwadekar/cc-variable-findstring ...

build: find "armclang" string in the 'CC' variable

Merge pull request #1719 from Yann-lms/useless_flags ...

stm32mp1: remove useless compilation flags

clang: 32 bit compilation should include march32-directive ...

This is done for other compilers, and without this some code does not
compile, like inline assembly code.

Fixes ARM-software/tf-issues#657.

Signed-off-by: Yann Gautier <yann.gautier@st.com>

Merge pull request #1720 from jeenu-arm/gic-priority ...

GIC: Remove lowest priority constants

Merge pull request #1723 from soby-mathew/sm/reset_bl31_fix ...

FVP: Fixes for RESET_TO_BL31

docs: User-guide corrections for RESET_TO_BL31 ...

This patch updates the user guide instructions for
RESET_TO_SP_MIN and RESET_TO_BL31 cases. The load
address for BL31 had to be updated because of increase
in code size. Also, information about PIE support when
RESET_TO_BL31=1 for FVP is added.

In the case of RESET_TO_SP_MIN, the RVBAR address
was wrong in the instruction. This is also corrected
in the patch.

Change-Id: I65fe6d28c5cf79bee0a11fbde320d49fcc1aacf5
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

BL31: correct GOT section omission ...

When the patch SHA 931f7c6 introduced PIE support for BL31,
adding the GOT section when the SEPARATE_CODE_AND_RODATA=0
to the linker script was erroneously omitted. This patch corrects
the same.

Also the patch reduces the alignment requirement for GOT and RELA
sections from 16 bytes to 8. Comments are added explain the
intent for alignment.

Change-Id: I8035cbf75f346f99bd56b13f32e0b3b70dd2fe6c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

FVP: Change BL31_BASE when RESET_TO_BL31=1 ...

This patch defines BL31_BASE to 0x0 when RESET_TO_BL31=1 as the
executable is built with PIE support and can be loaded anywhere
in SRAM for execution.

Change-Id: I4007f4626322f1200a6304c9c565987d3357986c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>