plat/arm/rddanielxlr: add platform function to return ROTPK ...

TBBR authentication framework depends on the plat_get_rotpk_info()
function to return the pointer to the Root of Trust Public Key (ROTPK)
stored in the platform along with its length. Add this function for
RD-Daniel Config-XLR platform to support Trusted Board Boot. The
function makes use of the wrapper function provided by the arm common
trusted board boot function to get the ROTPK hash.

Change-Id: I509e2f7e88cc2167e1732a971d71dc131d3d4b01
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>

plat/arm/rddaniel: add platform function to return ROTPK ...

TBBR authentication framework depends on the plat_get_rotpk_info()
function to return the pointer to the Root of Trust Public Key (ROTPK)
stored in the platform along with its length. Add this function for
RD-Daniel platform to support Trusted Board Boot. The function makes use
of the wrapper function provided by the arm common trusted board boot
function to get the ROTPK hash.

Change-Id: I6c2826a7898664afea19fd62432684cfddd9319a
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>

gicv3: Do power management on Arm GIC-Clayton as well ...

The Arm GIC-Clayton IP has the same power management requirements as
the GIC-600, when it comes to powering up the redistributors before
using them.

Add the IIDR value to the existing list of implementations requiring
the power sequence.

Change-Id: Ib965dfe278c40a4fff94f65a8d445c27a2ae6fd2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

FVP Doc: Update list of supported FVP platforms ...

This patch adds the following models
 FVP_Base_Neoverse-E1x1
 FVP_Base_Neoverse-E1x2
 FVP_Base_Neoverse-E1x4
to the list of supported FVP platforms.

Change-Id: Ib526a2a735f17724af3a874b06bf69b4ca85d0dd
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

TF-A GICv2 driver: Introduce makefile ...

This patch moves all GICv2 driver files into new added
'gicv2.mk' makefile for the benefit of the generic driver
which can evolve in the future without affecting platforms.

NOTE: Usage of 'drivers/arm/gic/common/gic_common.c' file
is now deprecated and platforms with GICv2 driver need to
be modified to include 'drivers/arm/gic/v2/gicv2.mk' in
their makefiles.

Change-Id: Ib10e71bdda0e5c7e80a049ddce2de1dd839602d1
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

Merge "TF-A: Redefine true/false definitions" into integration

Merge "rpi4/fdt: Move dtb_size() function to fdt_wrappers.h" into integration

Merge changes from topic "brcm_rng_driver" into integration ...

* changes:
  driver: brcm: add RNG driver
  plat/brcm: Define RNG base address

rpi4/fdt: Move dtb_size() function to fdt_wrappers.h ...

Getting the actual size of a DTB blob is useful beyond the Raspberry Pi
port, so let's move this helper to a common header.

Change-Id: Ia5be46e9353ca859a1e5ad9e3c057a322dfe22e2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Merge changes from topic "imx8mp_basic_support" into integration ...

* changes:
  plat: imx8mp: Add the basic support for i.MX8MP
  plat: imx8m: Move the gpc hw reg to a separate header file

Merge "uniphier: increase BL33 max size and GZIP temporary buffer size" into integration

Merge "IO Driver Misra Cleanup" into integration

IO Driver Misra Cleanup ...

This patch cleans up MISRA C violations in the IO driver files.  Some
things did not make sense to fix or would require sweeping changes
but the simple issues have been resolved.

Defects Fixed

File                        Line Rule
drivers/io/io_fip.c         39   MISRA C-2012 Rule 5.6 (required)
drivers/io/io_fip.c         52   MISRA C-2012 Rule 8.9 (advisory)
drivers/io/io_fip.c         60   MISRA C-2012 Rule 5.9 (advisory)
drivers/io/io_fip.c         285  MISRA C-2012 Rule 8.9 (advisory)
drivers/io/io_fip.c         336  MISRA C-2012 Rule 15.4 (advisory)
drivers/io/io_fip.c         340  MISRA C-2012 Rule 15.4 (advisory)
drivers/io/io_fip.c         342  MISRA C-2012 Rule 15.4 (advisory)
drivers/io/io_memmap.c      30   MISRA C-2012 Rule 5.6 (required)
drivers/io/io_memmap.c      32   MISRA C-2012 Rule 5.9 (advisory)
drivers/io/io_memmap.c      85   MISRA C-2012 Rule 11.8 (required)
drivers/io/io_semihosting.c 66   MISRA C-2012 Rule 11.8 (required)
drivers/io/io_storage.c     73   MISRA C-2012 Rule 5.9 (advisory)
drivers/io/io_storage.c     116  MISRA C-2012 Rule 13.4 (advisory)

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Id9b1b2b684588d4eaab674ed4ed04f3950dd21f4

stm32mp1: SCMI clock and reset service in SP_MIN ...

This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firmware.

Requests execution use a fastcall SMC context using a SiP function ID.
The setup allows the create SCMI channels by assigning a specific
SiP SMC function ID for each channel/agent identifier defined. In this
change, stm32mp1 exposes a single channel and hence expects single
agent at a time.

The input payload in copied in secure memory before the message
in passed through the SCMI server drivers. BL32/sp_min is invoked
for a single SCMI message processing and always returns with a
synchronous response message passed back to the caller agent.

This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was
previously wrongly set 4 whereas only 1 SiP SMC function ID was to
be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the
2 added SiP SMC function IDs for SCMI services.

Change-Id: Icb428775856b9aec00538172aea4cf11e609b033
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

dts: bindings: stm32mp1: define SCMI clock and reset domain IDs ...

Define the platform SCMI clocks and reset domains for stm32mp1 family.
SCMI agent 0 accesses clock/reset controllers under RCC TZEN hardening.
SCMI agent 1 accesses clock controllers under RCC MCKPROT hardening.

Change-Id: I52e906f846d445a3e6850e5f2e1584da14692553
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

Merge "drivers/stm32_hash: register resources as secure or not" into integration

Merge "drivers/stm32_gpio: register GPIO resources as secure or not" into integration

Merge "drivers/stm32_iwdg: register IWDG resources as secure or not" into integration

Merge "drivers/stm32mp_pmic: register PMIC resources as secure or not" into integration

Merge "stm32mp1: register shared resource per GPIO bank/pin" into integration

Merge "stm32mp1: register shared resource per IOMEM address" into integration

Merge "stm32mp1: allow non-secure access to reset upon periph registration" into integration

Merge "stm32mp1: allow non-secure access to clocks upon periph registration" into integration

Merge "stm32mp1: shared resources: peripheral registering" into integration

Merge "drivers: st: clock: register parent of secure clocks" into integration

Merge "stm32mp1: shared resources: add trace messages" into integration

Merge "fiptool: return zero status on help and help <command>" into integration

Merge changes from topic "fpga_cmdline" into integration ...

* changes:
  arm_fpga: Predefine DTB and BL33 load addresses
  arm_fpga: Add Klein and Matterhorn support
  arm_fpga: Support more CPU clusters

TF-A: Redefine true/false definitions ...

This patch redefines 'true' and 'false' definitions in
'include/lib/libc/stdbool.h' to fix defect reported by
MISRA C-2012 Rule 10.1
"The expression \"0\" of non-boolean essential type is
being interpreted as a boolean value for the operator \"? :\"."

Change-Id: Ie1b16e5826e5427cc272bd753e15d4d283e1ee4c
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

Merge "io_storage: remove redundant assigments" into integration