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2020-02-03	62038be Browse files » doc: qemu: fix and update documentation ... The current URL for QEMU_EFI.fd is not found. Update the link to point to the new one. If you run the shell command as instructed, you will see this error: qemu-system-aarch64: keep_bootcon: Could not open 'keep_bootcon': No such file or directory The part "console=ttyAMA0,38400 keep_bootcon root=/dev/vda2" is the kernel parameter, so it must be quoted. As of writing, QEMU v4.2.0 is the latest, but it does not work for TF-A (It has been fixed in the mainline.) QEMU v4.1.0 works fine. With those issues addressed, I succeeded in booting the latest kernel. Tested with QEMU v4.1.0 and Linux 5.5 (defconfig with no modification). Update the tested versions. Change-Id: Ic85db0e688d67b1803ff890047d37de3f3db2daa Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 3 Feb 2020
2020-01-31	989429e Browse files » Merge "Add support for documentation build as a target in Makefile" into integration Sandrine Bailleux authored on 31 Jan 2020 TrustedFirmware Code Review committed on 31 Jan 2020
2020-01-30	dcd03ce Browse files » Merge changes from topic "sb/select-cot" into integration ... * changes: Introduce COT build option cert_create: Remove references to TBBR in common code cert_create: Introduce COT build option cert_create: Introduce TBBR CoT makefile Sandrine Bailleux authored on 30 Jan 2020 TrustedFirmware Code Review committed on 30 Jan 2020
2020-01-29	3bff910 Browse files » Introduce COT build option ... Allows to select the chain of trust to use when the Trusted Boot feature is enabled. This affects both the cert_create tool and the firmware itself. Right now, the only available CoT is TBBR. Change-Id: I7ab54e66508a1416cb3fcd3dfb0f055696763b3d Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 29 Jan 2020
	6de3237 Browse files » Add support for documentation build as a target in Makefile ... Command to build HTML-formatted pages from docs: make doc Change-Id: I4103c804b3564fe67d8fc5a3373679daabf3f2e9 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Madhukar Pappireddy committed on 29 Jan 2020
	8efec9e Browse files » Merge changes I0fb7cf79,Ia8eb4710 into integration ... * changes: qemu: Implement qemu_system_off via semihosting. qemu: Support ARM_LINUX_KERNEL_AS_BL33 to pass FDT address. Soby Mathew authored on 29 Jan 2020 TrustedFirmware Code Review committed on 29 Jan 2020
2020-01-28	8c10529 Browse files » Measured Boot: add function for hash calculation ... This patch adds 'calc_hash' function using Mbed TLS library required for Measured Boot support. Change-Id: Ifc5aee0162d04db58ec6391e0726a526f29a52bb Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 28 Jan 2020
2020-01-28	91ff490 Browse files » Merge "Neovers N1: added support to update presence of External LLC" into integration Manish Pandey authored on 28 Jan 2020 TrustedFirmware Code Review committed on 28 Jan 2020
2020-01-27	f2d6b4e Browse files » Neovers N1: added support to update presence of External LLC ... CPUECTLR_EL1.EXTLLC bit indicates the presense of internal or external last level cache(LLC) in the system, the reset value is internal LLC. To cater for the platforms(like N1SDP) which has external LLC present introduce a new build option 'NEOVERSE_N1_EXTERNAL_LLC' which can be enabled by platform port. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ibf475fcd6fd44401897a71600f4eafe989921363 Manish Pandey committed on 27 Jan 2020
2020-01-24	d974301 Browse files » TSP: add PIE support ... This implementation simply mimics that of BL31. Change-Id: Ibbaa4ca012d38ac211c52b0b3e97449947160e07 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 24 Jan 2020
2020-01-24	69af7fc Browse files » BL2_AT_EL3: add PIE support ... This implementation simply mimics that of BL31. I did not implement the ENABLE_PIE support for BL2_IN_XIP_MEM=1 case. It would make the linker script a bit uglier. Change-Id: If3215abd99f2758dfb232e44b50320d04eba808b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 24 Jan 2020
2020-01-23	208ebe7 Browse files » Merge "xilinx: versal: PLM to ATF handover" into integration Alexei Fedorov authored on 23 Jan 2020 TrustedFirmware Code Review committed on 23 Jan 2020
	74464d5 Browse files » qemu: Support ARM_LINUX_KERNEL_AS_BL33 to pass FDT address. ... This lets the Linux kernel or any other image which expects an FDT in x0 be loaded directly as BL33 without a separate bootloader on QEMU. Signed-off-by: Andrew Walbran <qwandor@google.com> Change-Id: Ia8eb4710a3d97cdd877af3b8aae36a2de7cfc654 Andrew Walbran committed on 23 Jan 2020
	09035d1 Browse files » spm-mm: correcting instructions to build SPM for FVP ... Out of two possible implementation of Secure Partition Manager(SPM) currently only Management mode (MM) design is supported and the support for SPM based on SPCI Alpha 1 prototype has been removed. Earlier both implementation used common build flag "ENABLE_SPM" but it has since been decoupled and MM uses a separate build FLAG "SPM_MM". Instructions to build it for FVP was still using "ENABLE_SPM", which has beend corrected in this patch. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I505b98173d6051816436aa602ced6dbec4efc776 Manish Pandey committed on 23 Jan 2020
	31ce893 Browse files » xilinx: versal: PLM to ATF handover ... Parse the parameter structure the PLM populates, to populate the bl32 and bl33 image structures. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I317072d1086f6cc6f90883c1b8b6d086ff57b443 Venkatesh Yadav Abbarapu committed on 23 Jan 2020
2020-01-22	f44d291 Browse files » Merge changes from topic "add-versal-soc-support" into integration ... * changes: plat: xilinx: Move pm_client.h to common directory plat: xilinx: versal: Make silicon default build target xilinx: versal: Wire silicon default setup versal: Increase OCM memory size for DEBUG builds plat: xilinx: versal: Dont set IOU switch clock arm64: versal: Adjust cpu clock for versal virtual xilinx: versal: Add support for PM_GET_OPERATING_CHARACTERISTIC EEMI call plat: versal: Add Get_ChipID API plat: xilinx: versal: Add load Pdi API support xilinx: versal: Add feature check API xilinx: versal: Implement set wakeup source for client plat: xilinx: versal: Add GET_CALLBACK_DATA function xilinx: versal: Add PSCI APIs for system shutdown & reset xilinx: versal: Add PSCI APIs for suspend/resume xilinx: versal: Remove no_pmc ops to ON power domain xilinx: versal: Add set wakeup source API xilinx: versal: Add client wakeup API xilinx: versal: Add query data API xilinx: versal: Add request wakeup API xilinx: versal: Add PM_INIT_FINALIZE API for versal xilinx: versal: Add support of PM_GET_TRUSTZONE_VERSION API xilinx: versal: enable ipi mailbox service xilinx: move ipi mailbox svc to xilinx common plat: xilinx: versal: Implement PM IOCTL API xilinx: versal: Implement power down/restart related EEMI API xilinx: versal: Add SMC handler for EEMI API xilinx: versal: Implement PLL related PM APIs xilinx: versal: Implement clock related PM APIs xilinx: versal: Implement pin control related PM APIs xilinx: versal: Implement reset related PM APIs xilinx: versal: Implement device related PM APIs xilinx: versal: Add support for suspend related APIs xilinx: versal: Add get_api_version support xilinx: Add support to send PM API to PMC using IPI for versal plat: xilinx: versal: Move versal_def.h to include directory plat: xilinx: versal: Move versal_private.h to include directory plat: xilinx: zynqmp: Use GIC framework for warm restart Soby Mathew authored on 22 Jan 2020 TrustedFirmware Code Review committed on 22 Jan 2020
2020-01-22	c9c0b66 Browse files » Merge "Set lld as the default linker for Clang builds" into integration Sandrine Bailleux authored on 22 Jan 2020 TrustedFirmware Code Review committed on 22 Jan 2020
2020-01-21	3b3d406 Browse files » Merge "docs: Add upcoming Change Log to Table of Contents" into integration Sandrine Bailleux authored on 21 Jan 2020 TrustedFirmware Code Review committed on 21 Jan 2020
2020-01-20	ac7764b Browse files » doc: stm32mp1: Update build command line ... Add new flags for storage support that must be used in the build command line. Add the complete build steps for an OP-TEE configuration. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I0c682f6eb0aab83aa929f4ba734d3151c264aeed Lionel Debieve committed on 20 Jan 2020
2020-01-17	641f16e Browse files » Set lld as the default linker for Clang builds ... The LLVM linker replaces the GNU linker as default for the link on Clang builds. It is possible to override the default linker by setting the LD build flag. The patch also updates the TF-A doc. Change-Id: Ic08552b9994d4fa8f0d4863e67a2726c1dce2e35 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com> Ambroise Vincent authored on 17 Jul 2019 Mark Dykes committed on 17 Jan 2020
2020-01-17	992d2fe Browse files » docs: Add upcoming Change Log to Table of Contents ... Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I2a7f38eaae3a78fc3caa37833af755c15e8236ce laurenw-arm committed on 17 Jan 2020
2020-01-16	38aac6d Browse files » Merge "docs: Creating a Change Log Template File" into integration Mark Dykes authored on 16 Jan 2020 TrustedFirmware Code Review committed on 16 Jan 2020
2020-01-15	7b9f0cf Browse files » plat: xilinx: versal: Make silicon default build target ... This patch makes default build target as silicon instead of QEMU. The default can be overwritten by specifying it through build flag VERSAL_PLATFORM. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Ia4cb1df1f206db3e514e8ce969acca875e973ace Siva Durga Prasad Paladugu authored on 10 Jul 2019 Jolly Shah committed on 15 Jan 2020
2020-01-14	4330905 Browse files » rpi4: Fix documentation of armstub config entry ... It's in fact mandatory. Seen with RPi firmware 1.20190925. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Change-Id: I80739b74f25817294adc52cfd26a3ec59c06f892 Jan Kiszka authored on 9 Dec 2019 Olivier Deprez committed on 14 Jan 2020
2020-01-13	dadd806 Browse files » Merge "docs: GCC toolchain upgrade to version 9.2-2019.12" into integration Alexei Fedorov authored on 13 Jan 2020 TrustedFirmware Code Review committed on 13 Jan 2020
2020-01-10	f35e5ab Browse files » docs: GCC toolchain upgrade to version 9.2-2019.12 ... This toolchain provides multiple cross compilers and are publicly available on developer.arm.com We build TF-A in CI using: AArch32 bare-metal target (arm-none-eabi) AArch64 ELF bare-metal target (aarch64-none-elf) Change-Id: I910200174d5bad985504d1af4a1ae5819b524003 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Madhukar Pappireddy committed on 10 Jan 2020
2020-01-10	5b33ad1 Browse files » Unify type of "cpu_idx" across PSCI module. ... NOTE for platform integrators: API `plat_psci_stat_get_residency()` third argument `last_cpu_idx` is changed from "signed int" to the "unsigned int" type. Issue / Trouble points 1. cpu_idx is used as mix of `unsigned int` and `signed int` in code with typecasting at some places leading to coverity issues. 2. Underlying platform API's return cpu_idx as `unsigned int` and comparison is performed with platform specific defines `PLAFORM_xxx` which is not consistent Misra Rule 10.4: The value of a complex expression of integer type may only be cast to a type that is narrower and of the same signedness as the underlying type of the expression. Based on above points, cpu_idx is kept as `unsigned int` to match the API's and low-level functions and platform defines are updated where ever required Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c Deepika Bhavnani committed on 10 Jan 2020
2020-01-08	3c0d784 Browse files » docs: Creating a Change Log Template File ... Creating a Change Log Template for ALL to update with relevant new features, changes, fixes and known issues for each upcoming release of Trusted Firmware-A. The contents of this file should be added to the collective change log at the time of release code freeze. Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: Idfbdcef0d40b10312dc88b6e1cbe31856fda887e laurenw-arm committed on 8 Jan 2020
2020-01-02	8a0a819 Browse files » Merge "bl31: Split into two separate memory regions" into integration Alexei Fedorov authored on 2 Jan 2020 TrustedFirmware Code Review committed on 2 Jan 2020
2019-12-29	f8578e6 Browse files » bl31: Split into two separate memory regions ... Some platforms are extremely memory constrained and must split BL31 between multiple non-contiguous areas in SRAM. Allow the NOBITS sections (.bss, stacks, page tables, and coherent memory) to be placed in a separate region of RAM from the loaded firmware image. Because the NOBITS region may be at a lower address than the rest of BL31, __RW_{START,END}__ and __BL31_{START,END}__ cannot include this region, or el3_entrypoint_common would attempt to invalidate the dcache for the entire address space. New symbols __NOBITS_{START,END}__ are added when SEPARATE_NOBITS_REGION is enabled, and the dcached for the NOBITS region is invalidated separately. Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: Idedfec5e4dbee77e94f2fdd356e6ae6f4dc79d37 Samuel Holland committed on 29 Dec 2019