allwinner: Add RSB driver ...

The "Reduced Serial Bus" is an Allwinner specific bus, bearing many
similarities with I2C. It sports a much higher bus frequency, though,
(typically 3 MHz) and requires much less handholding for the typical
task of manipulating slave registers (fire-and-forget).
On most A64 boards this bus is used to connect the PMIC to the SoC.

This driver provides basic primitives to read and write slave registers,
it will be later used by the PMIC code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: H5: Implement power down for H5 reference design boards ...

Allwinner produces reference board designs, which apparently most board
vendors copy from. So every H5 board I checked uses regulators which are
controlled by the same PortL GPIO pins to power the ARM CPU cores, the
DRAM and the I/O ports.
Add a SoC specific power down routine, which turns those regulators off
when ATF detects running on an H5 SoC and the rich OS triggers a
SYSTEM_POWEROFF PSCI call.

NOTE: It sounds very tempting to turn the CPU power off, but this is not
working as expected, instead the system is rebooting. Most probably this
is due to VCC-SYS also being controlled by the same GPIO line, and
turning this off requires an elaborate and not fully understood setup.
Apparently not even Allwinner reference code is turning this regulator
off. So for now we refrain to pulling down PL8, the power consumption is
quite low anyway, so we are as close to poweroff as reasonably possible.
Many thanks to Samuel for doing some research on that topic.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Introduce GPIO helper function ...

Many boards without a dedicated PMIC contain simple regulators, which
can be controlled via GPIO pins.

To later allow turning them off easily, introduce a simple function to
configure a given pin as a GPIO out pin and set it to the desired level.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Export sunxi_private.h ...

So far we have a sunxi_private.h header file in the common code directory.
This holds the prototypes of various functions we share in *common*
code. However we will need some of those in the platform specific code
parts as well, and want to introduce new functions shared across the
whole platform port.

So move the sunxi_private.h file into the common/include directory, so
that it becomes visible to all parts of the platform code.
Fix up the existing #includes and add missing ones, also add the
sunxi_read_soc_id() prototype here.

This will be used in follow up patches.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: A64/H5: Add basic and generic shutdown method ...

Some boards don't have a PMIC, so they can't easily turn their power
off. To cover those boards anyway, let's turn off as many devices and
clocks as possible, so that the power consumption is reduced. Then
halt the last core, as before.
This will later be extended with proper PMIC support for supported
boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Pass SoC ID to sunxi_pmic_setup() ...

In the BL31 platform setup we read the Allwinner SoC ID to identify the
chip and print its name.
In addition to that we will need to differentiate the power setup
between the SoCs, to pass on the SoC ID to the PMIC setup routine.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Introduce names for SoC IDs ...

We will soon make more use of the Allwinner SoC ID, to differentiate the
platform setup.
Introduce definitions to avoid dealing with magic numbers and make the
code more readable.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: H6: Fix SRAM size ...

The SRAM in the Allwinner H6 SoC starts at 0x2000, with the last part
ending at 0x117fff (although with gaps in between).
So SUNXI_SRAM_SIZE should be 0xf8000, not 0x98000.

Fix this to map the arisc exception vector area, which we will need
shortly.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Disable USE_COHERENT_MEM ...

According to the documentation, platforms may choose to trade memory
footprint for performance (and elegancy) by not providing a separately
mapped coherent page.

Since a debug build is getting close to the SRAM size limit already, this
allows us to save about 3.5KB of BSS and have some room for future
enhancements.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Adjust memory mapping to fit into 256MB ...

At the moment we map as much of the DRAM into EL3 as possible, however
we actually don't use it. The only exception is the secure DRAM for
BL32 (if that is configured).

To decrease the memory footprint of ATF, we save on some page tables by
reducing the memory mapping to the actually required regions: SRAM, device
MMIO, secure DRAM and U-Boot (to be used later).
This introduces a non-identity mapping for the DRAM regions.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Unify platform.mk files ...

For the two different platforms we support in the Allwinner port we
mostly rely on header files covering the differences. This leads to the
platform.mk files in the respective directories to be almost identical.

To avoid further divergence and make sure that one platform doesn't
break accidentally, let's create a shared allwinner-common.mk file and
include that from the platform directory.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Merge pull request #1632 from Yann-lms/stm32mp1_mmc ...

Add MMC support for STM32MP1

Merge pull request #1582 from ldts/rcar_gen3/upstream ...

rcar_gen3: initial support

Merge pull request #1553 from glneo/dcache-late-disable ...

Allow D-Cache to remain on during core power-down

Merge pull request #1629 from robertovargas-arm/hw-assisted-coherency-lock ...

Optimize bakery locks when HW_ASSISTED_COHERENCY is enabled

Merge pull request #1631 from deepan02/deepak-arm/relocate-jump_if_cpu_midr ...

plat/arm: relocate the jump_if_cpu_midr macro.

Merge pull request #1628 from antonio-nino-diaz-arm/an/sharing ...

plat/arm: Small reorganization of platform code

rcar_gen3: drivers: watchdog ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: serial controller interface ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: spi multio bus controller ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: rom api ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: power controller ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: console ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: io [emmc/mem] ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: i2c dvfs ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: emmc ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: dma ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: micro delay generator ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: cpld ...

Signed-off-by: ldts <jramirez@baylibre.com>

rcar_gen3: drivers: board identification ...

Signed-off-by: ldts <jramirez@baylibre.com>