Rename symbols and files relating to CVE-2017-5715 ...

This patch renames symbols and files relating to CVE-2017-5715 to make
it easier to introduce new symbols and files for new CVE mitigations.

Change-Id: I24c23822862ca73648c772885f1690bed043dbc7
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>

Merge pull request #1386 from soby-mathew/sm/dyn_bl31 ...

Extend dynamic configuration

Merge pull request #1393 from geesun/correct_comment ...

Correct some typo errors in comment

Merge pull request #1390 from soby-mathew/sm/fvp_rm_dtb ...

Remove the DTBs and update userguide for FVP

Correct some typo errors in comment ...

File: include/common/aarch64/el3_common_macros.S

Change-Id: I619401e961a3f627ad8864781b5f90bc747c3ddb
Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>

Merge pull request #1359 from danielboulby-arm/db/match_flags_type ...

Ensure read and write of flags defined in the console struct are 32 bit

FVP: Add dummy configs for BL31, BL32 and BL33 ...

This patch adds soc_fw_config, tos_fw_config and nt_fw_config to the FVP.
The config files are placeholders and do not have any useful bindings
defined. The tos_fw_config is packaged in FIP and loaded by BL2 only
if SPD=tspd. The load address of these configs are specified in tb_fw_config
via new bindings defined for these configs. Currently, in FVP, the
soc_fw_config and tos_fw_config is loaded in the page between BL2_BASE
and ARM_SHARED_RAM. This memory was typically used for BL32 when
ARM_TSP_RAM_LOCATION=tsram but since we cannot fit BL32 in that
space anymore, it should be safe to use this memory for these configs.
There is also a runtime check in arm_bl2_dyn_cfg_init() which ensures
that this overlap doesn't happen.

The previous arm_dyn_get_hwconfig_info() is modified to accept configs
other than hw_config and hence renamed to arm_dyn_get_config_load_info().
The patch also corrects the definition of ARM_TB_FW_CONFIG_LIMIT to be
BL2_BASE.

Change-Id: I03a137d9fa1f92c862c254be808b8330cfd17a5a
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Docs: Update user guide for Dynamic Config on FVP ...

From TF-A v1.5, FVP supports loading the kernel FDT through
firmware as part of dynamic configuration feature. This means
that the FDT no longer needs to be loaded via Model parameters.
This patch updates the user guide to reflect the same.

Change-Id: I79833beeaae44a1564f6512c3a473625e5959f65
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Dynamic_config: remove the FVP dtb files ...

Since FVP enables dynamic configuration by default, the DT blobs are
compiled from source and included in FIP during build. Hence this
patch removes the dtb files from the `fdts` folder.

Change-Id: Ic155ecd257384a33eb2aa38c9b4430e47b09cd31
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Dynamic cfg: Enable support on CoT for other configs ...

This patch implements support for adding dynamic configurations for
BL31 (soc_fw_config), BL32 (tos_fw_config) and BL33 (nt_fw_config). The
necessary cert tool support and changes to default chain of trust are made
for these configs.

Change-Id: I25f266277b5b5501a196d2f2f79639d838794518
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

FVP: Enable capability to disable auth via dynamic config ...

This patch adds capability to FVP to disable authentication dynamically
via the `disable_auth` property in TB_FW_CONFIG. Both BL1 and BL2 parses
the TB_FW_CONFIG for the `disable_auth` property and invokes the
`load_dyn_disable_auth()` API to disable authentication if the
property is set to 1. The DYN_DISABLE_AUTH is enabled by default for
FVP as it is a development platform. Note that the TB_FW_CONFIG has to
be authenticated by BL1 irrespective of these settings.

The arm_bl2_dyn_cfg_init() is now earlier in bl2_plat_preload_setup()
rather than in bl2_platform_setup() as we need to get the value of
`disable_auth` property prior to authentication of any image by BL2.

Change-Id: I734acd59572849793e5020ec44c6ac51f654a4d1
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Allow disabling authentication dynamically ...

This patch allows platforms to dynamically disable authentication of
images during cold boot. This capability is controlled via the
DYN_DISABLE_AUTH build flag and is only meant for development
purposes.

Change-Id: Ia3df8f898824319bb76d5cc855b5ad6c3d227260
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Merge pull request #1369 from sivadur/xilinxdiff ...

Xilinx platform mangement related changes

Ensure read and write of flags are 32 bit ...

In 'console_set_scope' and when registering a console, field 'flags' of
'console_t' is assigned a 32-bit value. However, when it is actually
used, the functions perform 64-bit reads to access its value. This patch
changes all 64-bit reads to 32-bit reads.

Change-Id: I181349371409e60065335f078857946fa3c32dc1
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Merge pull request #1340 from Andre-ARM/sec-irqs-fixes ...

Fix support for systems without secure interrupts

Merge pull request #1384 from rockchip-linux/for_m0_patch ...

for rk3399 suspend/resume

zynqmp: Add wdt timeout restart functionality ...

This patch adds support to restart system incase of wdt
timeout.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

zynqmp: Fix EG/EV detection logic ...

The vcu disable bit in efuse ipdisable register is valid
only if PL powered up so, consider PL powerup status for
determing EG/EV part. If PL is not powered up, display
EG/EV as a part of string. The PL powerup status will
be filled by pmufw based on PL PROGB status in the
9th bit of version field.This patch also used IPI
to get this info from pmufw instead of directly accessing
the registers. Accessing this info from pmufw using
IPI fixes the issue of PMUFW access denied error for
reading IPDISABLE register.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

zynqmp: Add new API for processing secure images ...

This patch adds new API for processing secure images. This API
is used for authentication and decryption of secure images using
xilsecure in pmufw.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

xilinx: zynqmp: pm_service: Fix APU only restart ...

Existing code blocks each IPI send request in ipi_mb_notify()
function till pmu clears respective bit in ipi observation
register.

After sending PM_SYSTEM_SHUTDOWN request to PMU, PMU will
restart APU. While PMU is restarting APU, ATF is running out
of OCM, which can cause read/write hang from/to OCM.
There is no need to wait for notification from PMU in case
of SystemShutdown request in ATF, as APU is going to restart.

This patch fixes APU only restart issue.

Signed-off-by: Tejas Patel <tejasp@xilinx.com>
Acked-by: Wendy Liang <wendy.liang@xilinx.com>

plat: xilinx: zynqmp: Make fpga load blocking until completed ...

This patch makes bitstream load blocking call and waits until
bitstream is loaded successfully or return with error.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Avesh Khan <aveshk@xilinx.com>

plat: xilinx: zynqmp: Remove GET_CALLBACK_DATA function ...

GET_CALLBACK_DATA function is not required now. IPI mailbox
can be used instead of GET_CALLBACK_DATA function.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

zynqmp: pm_service: Make PMU IPI-1 channel unsecure ...

PMU IPI-1 is used for callbacks from PMU to master. Unsecure
master can also receive callbacks from PMU, so make PMU IPI-1
as non-secure.

All requests from master(s) to PMU would still go on PMU IPI-1
secure channel.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>

zynqmp: pm: Remove unnecessary header includes ...

Remove includes of gic_common.h and string.h which
are not required.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Acked-by: Jolly Shah <jollys@xilinx.com>

xilinx: zynqmp: Remove PMU Firmware checks ...

Xilinx now requires the PMU FW when using ATF, so it doesn't make sense
to maintain checks for the PMU FW in ATF. This also means that cases
where ATF came up before the PMU FW (such as on QEMU) ATF will now hang
waiting for the PMU FW instead of aborting.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

zynqmp: pm: Reverse logic for detecting that the PMU firmware is loaded ...

Use positive logic (pm_up instead of pm_down) to check whether PMU
services are available. This change also puts the variable into the
BSS section rather than the Data section as the variable is now
initialized to 0 rather than 1.

Signed-off-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

plat: zynqmp: Don't panic() if we can't find the FSBL struct ...

If we can't find the FSBL handoff struct don't panic and just use the
defaults instead.

We still print a warning to the user to let them know what we couldn't
find it.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

plat: zynqmp: Let fsbl_atf_handover() return an error status ...

Instead of calling panic() in fsbl_atf_handover() return the error
status so that bl31_early_platform_setup() can act accordingly.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

Include "bl_common.h" in Xilinx zynqmp_private.h ...

Type "entry_point_info_t" is used in zynqmp_private.h. It is defined
in "bl_common.h". The header file which defines the type should be
included.

Signed-off-by: Wendy Liang <jliang@xilinx.com>

zynqmp: pm: Added APIs for xilsecure linux support ...

Added SHA to calculate SHA3 hash,RSA to encrypt data with
public key and decrypt with private key and AES to do symmetric
encryption with User key or device key.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>