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2017-02-06	308d359 Browse files » Introduce unified API to zero memory ... Introduce zeromem_dczva function on AArch64 that can handle unaligned addresses and make use of DC ZVA instruction to zero a whole block at a time. This zeroing takes place directly in the cache to speed it up without doing external memory access. Remove the zeromem16 function on AArch64 and replace it with an alias to zeromem. This zeromem16 function is now deprecated. Remove the 16-bytes alignment constraint on __BSS_START__ in firmware-design.md as it is now not mandatory anymore (it used to comply with zeromem16 requirements). Change the 16-bytes alignment constraints in SP min's linker script to a 8-bytes alignment constraint as the AArch32 zeromem implementation is now more efficient on 8-bytes aligned addresses. Introduce zero_normalmem and zeromem helpers in platform agnostic header that are implemented this way: * AArch32: * zero_normalmem: zero using usual data access * zeromem: alias for zero_normalmem * AArch64: * zero_normalmem: zero normal memory using DC ZVA instruction (needs MMU enabled) * zeromem: zero using usual data access Usage guidelines: in most cases, zero_normalmem should be preferred. There are 2 scenarios where zeromem (or memset) must be used instead: * Code that must run with MMU disabled (which means all memory is considered device memory for data accesses). * Code that fills device memory with null bytes. Optionally, the following rule can be applied if performance is important: * Code zeroing small areas (few bytes) that are not secrets should use memset to take advantage of compiler optimizations. Note: Code zeroing security-related critical information should use zero_normalmem/zeromem instead of memset to avoid removal by compilers' optimizations in some cases or misbehaving versions of GCC. Fixes ARM-software/tf-issues#408 Change-Id: Iafd9663fc1070413c3e1904e54091cf60effaa82 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 6 Feb 2017
2017-01-31	bcc2bf0 Browse files » Merge pull request #821 from jeenu-arm/errata-printing ... Errata printing infrastructure danh-arm authored on 31 Jan 2017 GitHub committed on 31 Jan 2017
2017-01-30	10bcd76 Browse files » Report errata workaround status to console ... The errata reporting policy is as follows: - If an errata workaround is enabled: - If it applies (i.e. the CPU is affected by the errata), an INFO message is printed, confirming that the errata workaround has been applied. - If it does not apply, a VERBOSE message is printed, confirming that the errata workaround has been skipped. - If an errata workaround is not enabled, but would have applied had it been, a WARN message is printed, alerting that errata workaround is missing. The CPU errata messages are printed by both BL1 (primary CPU only) and runtime firmware on debug builds, once for each CPU/errata combination. Relevant output from Juno r1 console when ARM Trusted Firmware is built with PLAT=juno LOG_LEVEL=50 DEBUG=1: VERBOSE: BL1: cortex_a57: errata workaround for 806969 was not applied VERBOSE: BL1: cortex_a57: errata workaround for 813420 was not applied INFO: BL1: cortex_a57: errata workaround for disable_ldnp_overread was applied WARNING: BL1: cortex_a57: errata workaround for 826974 was missing! WARNING: BL1: cortex_a57: errata workaround for 826977 was missing! WARNING: BL1: cortex_a57: errata workaround for 828024 was missing! WARNING: BL1: cortex_a57: errata workaround for 829520 was missing! WARNING: BL1: cortex_a57: errata workaround for 833471 was missing! ... VERBOSE: BL31: cortex_a57: errata workaround for 806969 was not applied VERBOSE: BL31: cortex_a57: errata workaround for 813420 was not applied INFO: BL31: cortex_a57: errata workaround for disable_ldnp_overread was applied WARNING: BL31: cortex_a57: errata workaround for 826974 was missing! WARNING: BL31: cortex_a57: errata workaround for 826977 was missing! WARNING: BL31: cortex_a57: errata workaround for 828024 was missing! WARNING: BL31: cortex_a57: errata workaround for 829520 was missing! WARNING: BL31: cortex_a57: errata workaround for 833471 was missing! ... VERBOSE: BL31: cortex_a53: errata workaround for 826319 was not applied INFO: BL31: cortex_a53: errata workaround for disable_non_temporal_hint was applied Also update documentation. Change-Id: Iccf059d3348adb876ca121cdf5207bdbbacf2aba Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 30 Jan 2017
2017-01-30	b38bc68 Browse files » Allow spin locks to be defined from assembly ... At present, spin locks can only defined from C files. Add some macros such that they can be defined from assembly files too. Change-Id: I64f0c214062f5c15b3c8b412c7f25c908e87d970 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 30 Jan 2017
2017-01-26	9edac04 Browse files » Resolve build errors flagged by GCC 6.2 ... With GCC 6.2 compiler, more C undefined behaviour is being flagged as warnings, which result in build errors in ARM TF build. The specific issue that this patch resolves is the use of (1 << 31), which is predominantly used in case statements, where 1 is represented as a signed int. When shifted to msb the behaviour is undefined. The resolution is to specify 1 as an unsigned int using a convenience macro ULL(). A duplicate macro MAKE_ULL() is replaced. Fixes ARM-software/tf-issues#438 Change-Id: I08e3053bbcf4c022ee2be33a75bd0056da4073e1 Signed-off-by: David Cunado <david.cunado@arm.com> David Cunado committed on 26 Jan 2017
2017-01-24	aa050a7 Browse files » stdlib: Import timingsafe_bcmp() from FreeBSD ... Some side-channel attacks involve an attacker inferring something from the time taken for a memory compare operation to complete, for example when comparing hashes during image authentication. To mitigate this, timingsafe_bcmp() must be used for such operations instead of the standard memcmp(). This function executes in constant time and so doesn't leak any timing information to the caller. Change-Id: I470a723dc3626a0ee6d5e3f7fd48d0a57b8aa5fd Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 24 Jan 2017
	3443866 Browse files » Merge pull request #818 from sandrine-bailleux-arm/sb/strnlen ... Add strnlen() to local C library danh-arm authored on 24 Jan 2017 GitHub committed on 24 Jan 2017
	d67879d Browse files » Add strnlen() to local C library ... This code has been imported and slightly adapted from FreeBSD: https://github.com/freebsd/freebsd/blob/6253393ad8df55730481bf2aafd76bdd6182e2f5/lib/libc/string/strnlen.c Change-Id: Ie5ef5f92e6e904adb88f8628077fdf1d27470eb3 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 24 Jan 2017
2017-01-23	4abd222 Browse files » Merge pull request #800 from masahir0y/ifdef ... Correct preprocessor conditionals danh-arm authored on 23 Jan 2017 GitHub committed on 23 Jan 2017
	e02be20 Browse files » Merge pull request #815 from hzhuang1/dwmmc_v3.9 ... drivers: add designware emmc driver danh-arm authored on 23 Jan 2017 GitHub committed on 23 Jan 2017
	3d8256b Browse files » Use #ifdef for IMAGE_BL* instead of #if ... One nasty part of ATF is some of boolean macros are always defined as 1 or 0, and the rest of them are only defined under certain conditions. For the former group, "#if FOO" or "#if !FOO" must be used because "#ifdef FOO" is always true. (Options passed by $(call add_define,) are the cases.) For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because checking the value of an undefined macro is strange. Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like follows: $(eval IMAGE := IMAGE_BL$(call uppercase,$(3))) $(OBJ): $(2) @echo " CC $$<" $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@ This means, IMAGE_BL* is defined when building the corresponding image, but undefined for the other images. So, IMAGE_BL* belongs to the latter group where we should use #ifdef or #ifndef. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 23 Jan 2017
	5dbdb7d Browse files » drivers: add designware emmc driver ... Support Designware eMMC driver. It's based on both IO block and eMMC driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Haojian Zhuang committed on 23 Jan 2017
	7b94e4b Browse files » Merge pull request #813 from antonio-nino-diaz-arm/an/libfdt ... Update libfdt to version 1.4.2 danh-arm authored on 23 Jan 2017 GitHub committed on 23 Jan 2017
	23beccc Browse files » Merge pull request #812 from antonio-nino-diaz-arm/an/clear-static-vars ... Clear static variables in X509 parser on error danh-arm authored on 23 Jan 2017 GitHub committed on 23 Jan 2017
2017-01-19	c8d64c5 Browse files » Fix declarations of cache maintenance functions ... Fix the parameter type of the maintenance functions of data cache. Add missing declarations for AArch32 versions of dcsw_op_louis and dcsw_op_all to match the AAch64 ones. Change-Id: I4226e8ea4f8b2b5bc2972992c83de659ee0da52c Antonio Nino Diaz committed on 19 Jan 2017
2017-01-18	f38d93f Browse files » Merge pull request #801 from masahir0y/cleanup ... Macro cleanups davidcunado-arm authored on 18 Jan 2017 GitHub committed on 18 Jan 2017
	fc17f61 Browse files » Merge pull request #790 from masahir0y/utils ... add utility macros to utils.h danh-arm authored on 18 Jan 2017 GitHub committed on 18 Jan 2017
	4749705 Browse files » Move BL_COHERENT_RAM_BASE/END defines to common_def.h ... We have lots of duplicated defines (and comment blocks too). Move them to include/plat/common/common_def.h. While we are here, suffix the end address with _END instead of _LIMIT. The _END is a better fit to indicate the linker-derived real end address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 18 Jan 2017
	ecdc898 Browse files » Use _END instead of _LIMIT for linker derived end addresses ... The usage of _LIMIT seems odd here, so rename as follows: BL_CODE_LIMIT --> BL_CODE_END BL_RO_DATA_LIMIT --> BL_RO_DATA_END BL1_CODE_LIMIT --> BL1_CODE_END BL1_RO_DATA_LIMIT --> BL1_RO_DATA_END Basically, we want to use _LIMIT and _END properly as follows: _SIZE + _MAX_SIZE = _LIMIT _SIZE + _SIZE = _END The _LIMIT is generally defined by platform_def.h to indicate the platform-dependent memory constraint. So, its typical usage is ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.") in a linker script. On the other hand, _END is used to indicate the end address of the compiled image, i.e. we do not know it until the image is linked. Here, all of these macros belong to the latter, so should be suffixed with _END. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 18 Jan 2017
2017-01-16	29440c1 Browse files » libfdt: Replace v1.4.1 by v1.4.2 ... Delete old version of libfdt at lib/libfdt. Move new libfdt API headers to include/lib/libfdt and all other files to lib/libfdt. Change-Id: I32b7888f1f20d62205310e363accbef169ad7b1b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 16 Jan 2017
2017-01-13	44f1c0b Browse files » Merge pull request #807 from nmenon/upstream/fix-16650-rx ... uart: 16550: Fix getc davidcunado-arm authored on 13 Jan 2017 GitHub committed on 13 Jan 2017
2017-01-12	152c8c1 Browse files » utils: move BIT(n) macro to utils.h ... We are duplicating this macro define, and it is useful enough to be placed in the common place. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 12 Jan 2017
2017-01-10	861ac52 Browse files » uart: 16550: Fix getc ... tbz check for RDR status is to check for a bit being zero. Unfortunately, we are using a mask rather than the bit position. Further as per http://www.ti.com/lit/ds/symlink/pc16550d.pdf (page 17), LSR register bit 0 is Data ready status (RDR), not bit position 2. Update the same to match the specification. Reported-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Nishanth Menon committed on 10 Jan 2017
2016-12-30	fcab6bb Browse files » fiptool: Add support for operating on binary blobs using the UUID ... Previously, fiptool only understood a fixed set of images as specified in tbbr_config.c. It preserved unknown images during the update, unpack and remove operations but it was not possible to explicitly refer to one of those unknown images. Add a new --blob option to create/update/unpack/remove images that are not known at compile time. This is accomplished by specifying the UUID and filename pair as shown below: $ ./fiptool create --blob uuid=01234567-89ab-cdef-0123-456789abcdef,file=foo.bin fip.bin $ ./fiptool info fip.bin 01234567-89ab-cdef-0123-456789abcdef: offset=0x60, size=0x1AA68 Fixes ARM-software/tf-issues#420 Change-Id: Iaac2504b9a4252289c09e73d29645cbe240f3a82 Signed-off-by: dp-arm <dimitris.papastamos@arm.com> dp-arm committed on 30 Dec 2016
2016-12-23	3df6012 Browse files » Abort preempted TSP STD SMC after PSCI CPU suspend ... Standard SMC requests that are handled in the secure-world by the Secure Payload can be preempted by interrupts that must be handled in the normal world. When the TSP is preempted the secure context is stored and control is passed to the normal world to handle the non-secure interrupt. Once completed the preempted secure context is restored. When restoring the preempted context, the dispatcher assumes that the TSP preempted context is still stored as the SECURE context by the context management library. However, PSCI power management operations causes synchronous entry into TSP. This overwrites the preempted SECURE context in the context management library. When restoring back the SECURE context, the Secure Payload crashes because this context is not the preempted context anymore. This patch avoids corruption of the preempted SECURE context by aborting any preempted SMC during PSCI power management calls. The abort_std_smc_entry hook of the TSP is called when aborting the SMC request. It also exposes this feature as a FAST SMC callable from normal world to abort preempted SMC with FID TSP_FID_ABORT. Change-Id: I7a70347e9293f47d87b5de20484b4ffefb56b770 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 23 Dec 2016
2016-12-21	153e5eb Browse files » Merge pull request #794 from douglas-raillard-arm/dr/fix_TSP_STD_FID_macro ... Fix TSP_STD_FID macro danh-arm authored on 21 Dec 2016 GitHub committed on 21 Dec 2016
2016-12-20	5388a58 Browse files » Fix TSP_STD_FID macro ... Enforce valid FID input in TSP_STD_FID and TSP_FAST_FID macros. Also remove an undefined behavior by using unsigned literals. Change-Id: Id37e908da861980a4eaa3a70b37a729f416ce272 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 20 Dec 2016
	bd83b41 Browse files » Merge pull request #791 from jeenu-arm/asm-assert-32 ... AArch32: Print ASM_ASSERT and panic messages danh-arm authored on 20 Dec 2016 GitHub committed on 20 Dec 2016
	67748e4 Browse files » Merge pull request #788 from jeenu-arm/cpuops-framework ... Add provision to extend CPU operations at more levels danh-arm authored on 20 Dec 2016 GitHub committed on 20 Dec 2016
	9acdafb Browse files » Merge pull request #793 from jeenu-arm/gic-changes ... GIC driver changes for extended power management danh-arm authored on 20 Dec 2016 GitHub committed on 20 Dec 2016