uart: 16550: Fix getc
tbz check for RDR status is to check for a bit being zero.
Unfortunately, we are using a mask rather than the bit position.

Further as per http://www.ti.com/lit/ds/symlink/pc16550d.pdf (page 17),
LSR register bit 0 is Data ready status (RDR), not bit position 2.

Update the same to match the specification.

Reported-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
1 parent 1761295 commit 861ac52a7e80c0399b6e543e7125a9c1e18a63f8
@Nishanth Menon Nishanth Menon authored on 10 Jan 2017
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drivers/ti/uart/aarch64/16550_console.S
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include/drivers/ti/uart/uart_16550.h