LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

2020-08-21	545b8eb Browse files » SPMD: Dont forward PARTITION_INFO_GET from secure FF-A instance ... Signed-off-by: Ruari Phipps <ruari.phipps@arm.com> Change-Id: I4e9fbfcfda4ed4b87d5ece1c609c57c73d617d4c Ruari Phipps authored on 28 Jul 2020 Olivier Deprez committed on 21 Aug 2020
	a6ab1ae Browse files » Merge changes from topic "spm-secondary-cores" into integration ... * changes: SPMC: embed secondary core ep info into to SPMC context SPMC: manifest changes to support multicore boot SPMD: secondary cores PM on and off SPD hooks relayed to SPMC SPMD: handle SPMC message to register secondary core entry point SPMD: introduce SPMC to SPMD messages SPMD: register the SPD PM hooks SPMD: add generic SPD PM handlers SPMD: enhance SPMC internal boot states SPMD: entry point info get helper Olivier Deprez authored on 21 Aug 2020 TrustedFirmware Code Review committed on 21 Aug 2020
	768f833 Browse files » Merge "doc: Minor formatting improvement in the coding guidelines document" into integration Sandrine Bailleux authored on 21 Aug 2020 TrustedFirmware Code Review committed on 21 Aug 2020
2020-08-20	02d50bb Browse files » SPMC: embed secondary core ep info into to SPMC context ... Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icdb15b8664fb3467ffd55b44d1f0660457192586 Olivier Deprez authored on 19 Jun 2020 Max Shvetsov committed on 20 Aug 2020
	2111b00 Browse files » SPMC: manifest changes to support multicore boot ... Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icf90c2ccce75257908ba3d4703926041d64b1dd3 Olivier Deprez authored on 12 Jun 2020 Max Shvetsov committed on 20 Aug 2020
	a92bc73 Browse files » SPMD: secondary cores PM on and off SPD hooks relayed to SPMC ... Define SPMD PM hooks for warm boot and off events. svc_on_finish handler enters the SPMC at the entry point defined by the secondary EP register service. The svc_off handler notifies the SPMC that a physical core is being turned off through a notification message. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I2609a75a0c6ffb9f6313fc09553be2b29a41de59 Olivier Deprez authored on 23 Mar 2020 Max Shvetsov committed on 20 Aug 2020
	f0d743d Browse files » SPMD: handle SPMC message to register secondary core entry point ... Upon booting, the SPMC running on the primary core shall register the secondary core entry points to which a given secondary core being woken up shall jump to into the SPMC . The current implementation assumes the SPMC calls a registering service implemented in the SPMD for each core identified by its MPIDR. This can typically happen in a simple loop implemented in the early SPMC initialization routines by passing each core identifier associated with an entry point address and context information. This service is implemented on top of a more generic SPMC<=>SPMD interface using direct request/response message passing as defined by the FF-A specification. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: I1f70163b6b5cee0880bd2004e1fec41e3780ba35 Olivier Deprez authored on 16 Apr 2020 Max Shvetsov committed on 20 Aug 2020
	c290141 Browse files » SPMD: introduce SPMC to SPMD messages ... FF-A interface to handle SPMC to SPMD direct messages requests. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Ia707a308c55561a31dcfa86e554ea1c9e23f862a Olivier Deprez authored on 16 Apr 2020 Max Shvetsov committed on 20 Aug 2020
	a334c4e Browse files » SPMD: register the SPD PM hooks ... Change-Id: If88d64c0e3d60accd2638a55f9f3299ec700a8c8 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Olivier Deprez authored on 28 Oct 2019 Max Shvetsov committed on 20 Aug 2020
	b058f20 Browse files » SPMD: add generic SPD PM handlers ... This patch defines and registers the SPMD PM handler hooks. This is intended to relay boot and PM events to the SPMC. Change-Id: If5a758d22b8d2152cbbb83a0cad563b5e1c6bd49 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Olivier Deprez authored on 28 Oct 2019 Max Shvetsov committed on 20 Aug 2020
	9dcf63d Browse files » SPMD: enhance SPMC internal boot states ... This patch adds SPMC states used by the SPMD to track SPMC boot phases specifically on secondary cores. Change-Id: If97af7352dda7f04a8e46a56892a2aeddcfab91b Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Olivier Deprez authored on 28 Oct 2019 Max Shvetsov committed on 20 Aug 2020
	c0267cc Browse files » SPMD: entry point info get helper ... This patch provides a helper to get the entry_point_info structure used by the boot CPU as it is used to initialise the SPMC context on secondary CPUs. Change-Id: I99087dc7a86a7258e545d24a2ff06aa25170f00c Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Olivier Deprez authored on 28 Oct 2019 Max Shvetsov committed on 20 Aug 2020
	1566bc3 Browse files » Merge "plat: imx8m: Fix the race condition during cpu hotplug" into integration Manish Pandey authored on 20 Aug 2020 TrustedFirmware Code Review committed on 20 Aug 2020
	7638011 Browse files » Merge changes from topic "at_errata_fix" into integration ... * changes: doc: Update description for AT speculative workaround lib/cpus: Report AT speculative erratum workaround Add wrapper for AT instruction Olivier Deprez authored on 20 Aug 2020 TrustedFirmware Code Review committed on 20 Aug 2020
	fe5e1c1 Browse files » plat: imx8m: Fix the race condition during cpu hotplug ... CPU hotplug & cpuidle have some race condition when doing CPU hotplug stress test. different CPU cores have the chance to access the same GPC register(A53_AD), so lock is necessary to do exlusive access. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I1296592e05fa78429c3f0fac066951521db755e3 Jacky Bai authored on 6 Jan 2020 Manish Pandey committed on 20 Aug 2020
	15e54af Browse files » Merge "SPM: Add third cactus partition to manifests" into integration Manish Pandey authored on 20 Aug 2020 TrustedFirmware Code Review committed on 20 Aug 2020
	9061c0c Browse files » doc: Minor formatting improvement in the coding guidelines document ... Change-Id: I5362780db422772fd547dc8e68e459109edccdd0 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 20 Aug 2020
2020-08-19	e168b66 Browse files » Merge changes from topic "aw_drivevbus" into integration ... * changes: plat/allwinner: Only enable DRIVEVBUS if really needed plat/allwinner: Use common gicv2.mk André Przywara authored on 19 Aug 2020 TrustedFirmware Code Review committed on 19 Aug 2020
	e5c84ca Browse files » Merge "libc/memset: Implement function in assembler" into integration Mark Dykes authored on 19 Aug 2020 TrustedFirmware Code Review committed on 19 Aug 2020
	e7d344d Browse files » libc/memset: Implement function in assembler ... Trace analysis of FVP_Base_AEMv8A model running in Aarch32 mode with the build options listed below: TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_ecdsa KEY_ALG=ecdsa ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_ecdsa.pem shows that when auth_signature() gets called 71.84% of CPU execution time is spent in memset() function written in C using single byte write operations, see lib\libc\memset.c. This patch replaces C memset() implementation with assembler version giving the following results: - for Aarch32 in auth_signature() call memset() CPU time reduced to 24.84%. - Number of CPU instructions executed during TF-A boot stage before start of BL33 in RELEASE builds: ---------------------------------------------- \| Arch \| C \| assembler \| % \| ---------------------------------------------- \| Aarch32 \| 2073275460 \| 1487400003 \| -28.25 \| \| Aarch64 \| 2056807158 \| 1244898303 \| -39.47 \| ---------------------------------------------- The patch also replaces memset.c with aarch64/memset.S in plat\nvidia\tegra\platform.mk. Change-Id: Ifbf085a2f577a25491e2d28446ee95a4ac891597 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 19 Aug 2020
	e268ea2 Browse files » Merge "SPM: Change condition on saving/restoring EL2 registers" into integration Manish Pandey authored on 19 Aug 2020 TrustedFirmware Code Review committed on 19 Aug 2020
	9de91c7 Browse files » SPM: Add third cactus partition to manifests ... Add information about the third partition so it can be loaded into SPM when running the tests Signed-off-by: Ruari Phipps <ruari.phipps@arm.com> Change-Id: I5544e88df391ef294ddf6b5750d468d3e74892b1 Ruari Phipps committed on 19 Aug 2020
	6b704da Browse files » SPM: Change condition on saving/restoring EL2 registers ... Make this more scalable by explicitly checking internal and hardware states at run_time Signed-off-by: Ruari Phipps <ruari.phipps@arm.com> Change-Id: I1c6ed1c1badb3538a93bff3ac5b5189b59cccfa1 Ruari Phipps committed on 19 Aug 2020
	572dea8 Browse files » Merge "plat: qti: Fix build failure" into integration Manish Pandey authored on 19 Aug 2020 TrustedFirmware Code Review committed on 19 Aug 2020
	a3b5004 Browse files » Merge changes Ic701675c,Ie55e25c8 into integration ... * changes: plat: imx8m: Correct the imr mask reg offset plat: imx8m: Keep A53 PLAT on in wait mode(ret) Manish Pandey authored on 19 Aug 2020 TrustedFirmware Code Review committed on 19 Aug 2020
	fb9212b Browse files » plat: imx8m: Correct the imr mask reg offset ... The number of gpc imr mask reg & the offset is different on some SOC, so correct it & replace the magic number with macro define. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: Ic701675cdd92e043dcd7f06722f2e871068aec74 Jacky Bai authored on 22 Jul 2020 Manish Pandey committed on 19 Aug 2020
	9eb1bb6 Browse files » plat: imx8m: Keep A53 PLAT on in wait mode(ret) ... Keep A53 PLAT(SCU) power domain on in wait mode(ret). RBC count only need to be set in PLAT OFF mode, so change it accordingly. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: Ie55e25c8210d298506fc4dca7a9653583db45e0c Jacky Bai authored on 8 Dec 2019 Manish Pandey committed on 19 Aug 2020
	9ce3711 Browse files » Merge "qemu/qemu_sbsa: enable SPM support" into integration Manish Pandey authored on 19 Aug 2020 TrustedFirmware Code Review committed on 19 Aug 2020
	3829453 Browse files » Merge changes from topic "tegra-downstream-07092020" into integration ... * changes: Tegra: platform: add function to check t194 chip Tegra: common: make plat_psci_ops routines static Manish Pandey authored on 19 Aug 2020 TrustedFirmware Code Review committed on 19 Aug 2020
2020-08-18	43d2207 Browse files » Tegra: platform: add function to check t194 chip ... This patch adds tegra_chipid_is_t194() function to check if it is a Tegra 194 chip. Change-Id: I6da6d3a2c9676b748931e42fde1b174cbcb4fd40 Signed-off-by: David Pu <dpu@nvidia.com> David Pu authored on 5 Aug 2019 Manish Pandey committed on 18 Aug 2020