fiptool: Update file open modes with 'b' (for Windows) ...

Unix does not distinguish binary and text modes.
On Windows the 'b' flag (e.g. "rb" instead of "r") is used to
indicate that files should be opened in binary mode.
This has no impact on Unix, but is needed on Windows to avoid
end-of-line issues.

Change-Id: I69424c55735d5d563d36c50bedd6357b8e05137e
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>

Merge pull request #1071 from jeenu-arm/syntax-fix ...

plat/arm: Fix ARM_INSTANTIATE_LOCK syntax anomaly

plat/arm: Fix ARM_INSTANTIATE_LOCK syntax anomaly ...

The current definition of ARM_INSTANTIATE_LOCK macro includes a
semicolon, which means it's omitted where it's used. This is anomalous
for a C statement in global scope.

Fix this by removing semicolon from the definition; and where it's a
NOP, declare a file-scoped variable explicitly tagged as unused to avoid
compiler warning.

No functional changes.

Change-Id: I2c1d92ece4777e272a025011e03b8003f3543335
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

Merge pull request #1070 from rockchip-linux/rk3399-fixes-logic ...

rockchip/rk3399: Support Turning off VD_LOGIC during suspend-to-ram

Merge pull request #1068 from jenswi-linaro/optee_arm_plat ...

Optee arm platform common

Merge pull request #1056 from geesun/qx/interrupt-diags ...

update the interrupt diagrams

rockchip/rk3399: reinitilize secure sgrf when resume ...

when shutdown logic power rail, the some sgrf register
value will reset, so need to reinitilize secure.

Change-Id: I8ad0570432e54441fe1c60dd2960a81fd58f7163
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: do secure timer init in pmusram ...

we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.

Change-Id: I472e7eec3fc197f56223e6fff9167556c1c5e3bc
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: use slice1 to restore ddr slice1 ~ slice4 ...

we do not have enough pmusram space now, so use slice1 to restore
ddr slice1 ~ slice4, that's will save more pmusram space.

Change-Id: Id54a7944f33d01a8f244cee6a8a0707bfe4d42da
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: disable more powerdomain prepare for shutdown logic rail ...

Change-Id: Ia59adf48cf14eb627721264765bce50cb31065ef
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: save and restore pd_alive register ...

pd_alive control cru, grf, timer, gpio and wdt, when
turn off logic power rail, these register value will
back to reset value, we need to save them value in suspend
and restore them when resuem, since timer will reinitial
in kernel, so it not need to save/restore.

Change-Id: I0fc2a011d3cdc04b66ffbf728e769eb28b51ee38
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: set ddr clock source back to dpll when ddr resume ...

when logic power rail shutdown, CRU register will back to reset
value, ddr use abpll as clock source when do suspend, we need to save
and dpll value in pmusram, then set back these ddr clock back to dpll
when dddr resume.

Change-Id: I95dc0173649e8515859cfa46b40a606e0cc2fe3f
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: reinitilize debug uart when resume ...

when shutdown logic power rail, the uart register value will reset,
so need to reinitilize debug uart.

Change-Id: I48d3535c0068fd671dea6ea32e908612992faf62
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

Merge pull request #1064 from islmit01/im/shifted_afinity ...

FVP: Always assume shifted affinity with MT bit

Merge pull request #1059 from kenkuang/intergration ...

fix a typo abort sctlr_el2

Merge pull request #1067 from jeenu-arm/rst-fix ...

firmware-design.rst: Fix formatting

Merge pull request #1061 from robertovargas-arm/norflash ...

nor-flash

Merge pull request #1065 from jenswi-linaro/optee_qemu ...

qemu: Add OP-TEE extra image parsing support

Merge pull request #1058 from alistair23/alistair/master ...

psci_common: Resolve GCC static analysis false positive

FVP: bl2: optionally map ARM_OPTEE_PAGEABLE_LOAD_MEM ...

If SPD_opteed is defined map ARM_OPTEE_PAGEABLE_LOAD_MEM in bl2 to
allow loading of OP-TEE paged part.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

ARM plat: change OP-TEE pageable load base ...

Changes ARM_OPTEE_PAGEABLE_LOAD_BASE to end of ARM_AP_TZC_DRAM1.
ARM_OPTEE_PAGEABLE_LOAD_SIZE is also increased to 4MB to optimize
translation table usage.

This change makes loading of paged part easier inside OP-TEE OS as the
previous location of ARM_OPTEE_PAGEABLE_LOAD_BASE normally isn't mapped
if paging is enabled.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

firmware-design.rst: Fix formatting ...

The format conversion wrongly formatted a couple of sections. These were
also missing from the Table of Contents.

Change-Id: I324216c27e7b4711e6cc5e25782f4b53842140cc
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

qemu: Add OP-TEE extra image parsing support ...

OP-TEE may have extra images to be loaded. Load them one by one and do
the parsing. In this patch, ARM TF need to load up to 3 images for
OP-TEE: header, pager and pages images. Header image is the info about
optee os and images. Pager image include pager code and data.  Paged
image include the paging parts using virtual memory.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

opteed: pass device tree pointer in x2 ...

Pass device tree pointer to OP-TEE in x2. bl2 is expected to fill in the
device tree pointer in args.arg3. Passing 0 means that device tree is
unavailable.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

qemu: replace deprecated plat_psci_common.c ...

Change to compile with new plat/common/plat_psci_common.c instead of the old
deprecated plat/common/aarch64/plat_psci_common.c

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

qemu: replace deprecated ADDR_SPACE_SIZE ...

Replaces the deprecated ADDR_SPACE_SIZE with PLAT_PHY_ADDR_SPACE_SIZE
and PLAT_VIRT_ADDR_SPACE_SIZE.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

psci_common: Resolve GCC static analysis false positive ...

Previously commit 555ebb3 attmpted to fix this
GCC issue:

services/std_svc/psci/psci_common.c: In function 'psci_do_state_coordination':
services/std_svc/psci/psci_common.c:220:27: error: array subscript is above
array bounds [-Werror=array-bounds]
  psci_req_local_pwr_states[pwrlvl - 1][cpu_idx] = req_pwr_state;

This fix doesn't work as asserts aren't built in non-debug build flows.

Let's use GCCs #pragma option (documented here:
https://gcc.gnu.org/onlinedocs/gcc/Diagnostic-Pragmas.html) to avoid
this false positive instead.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

FVP: Always assume shifted affinity with MT bit ...

At present, the MPIDR validation on FVP relies on MT bit set along
with shifted affinities. This currently is additionally dependent
on the FVP model being of variant C. This however should be based
on the presence of MT bit alone.

This patch makes the change to always assume that the affinities
are shifted in the FVP model when MT bit is present.

Change-Id: I09fcb0126e1b38d29124bdeaf3450a60b95d485d
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>

Merge pull request #1017 from etienne-lms/minor-docs ...

Minor docs

Makefile: correct path for CHECKPATCH warnings ...

Change-Id: I08c9789d3fd2b034b08de663d151023ca005f77f
Reported-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>