2015-04-13 |
Fix recursive crash prints on FVP AEM model
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This patch fixes an issue in the cpu specific register reporting
of FVP AEM model whereby crash reporting itself triggers an exception
thus resulting in recursive crash prints. The input to the
'size_controlled_print' in the crash reporting framework should
be a NULL terminated string. As there were no cpu specific register
to be reported on FVP AEM model, the issue was caused by passing 0
instead of NULL terminated string to the above mentioned function.
Change-Id: I664427b22b89977b389175dfde84c815f02c705a
Soby Mathew
committed
on 13 Apr 2015
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2015-04-09 |
Merge pull request #284 from kpet/kp/tf-issues-295
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Add support to indicate size and end of assembly functions
danh-arm
committed
on 9 Apr 2015
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2015-04-08 |
Add support to indicate size and end of assembly functions
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In order for the symbol table in the ELF file to contain the size of
functions written in assembly, it is necessary to report it to the
assembler using the .size directive.
To fulfil the above requirements, this patch introduces an 'endfunc'
macro which contains the .endfunc and .size directives. It also adds
a .func directive to the 'func' assembler macro.
The .func/.endfunc have been used so the assembler can fail if
endfunc is omitted.
Fixes ARM-Software/tf-issues#295
Change-Id: If8cb331b03d7f38fe7e3694d4de26f1075b278fc
Signed-off-by: Kévin Petit <kevin.petit@arm.com>
Kévin Petit
committed
on 8 Apr 2015
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2015-04-01 |
Merge pull request #277 from soby-mathew/sm/coh_lock_opt
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Optimize the bakery lock implementation
danh-arm
committed
on 1 Apr 2015
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Merge pull request #279 from sandrine-bailleux/sb/fix-checkpatch
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Bug Fix: Fix checkpatch rule in Makefile
danh-arm
committed
on 1 Apr 2015
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Merge pull request #280 from vwadekar/tlkd-fixed-v3
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TLK dispatcher
danh-arm
committed
on 1 Apr 2015
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2015-03-31 |
TLK-D documentation and add NVIDIA to the Acknowledgements file
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Include TLK Dispatcher's documentation and add NVIDIA to the
Acknowledgements file. TLK is now a supported Trusted OS with
the Trusted Firmware.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 31 Mar 2015
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Open/Close TA sessions, send commands/events to TAs
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This patch adds support to open/close secure sessions with Trusted
Apps and later send commands/events. Modify TLK_NUM_FID to indicate
the total number of FIDs available to the NS world.
Change-Id: I3f1153dfa5510bd44fc25f1fee85cae475b1abf1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 31 Mar 2015
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Preempt/Resume standard function ID calls
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This patch allows servicing of the non-secure world IRQs when the
CPU is in the secure world. Once the interrupt is handled, the
non-secure world issues the Resume FID to allow the secure payload
complete the preempted standard FID.
Change-Id: Ia52c41adf45014ab51d8447bed6605ca2f935587
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 31 Mar 2015
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Translate secure/non-secure virtual addresses
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This patch adds functionality to translate virtual addresses from
secure or non-secure worlds. This functionality helps Trusted Apps
to share virtual addresses directly and allows the NS world to
pass virtual addresses to TLK directly.
Change-Id: I77b0892963e0e839c448b5d0532920fb7e54dc8e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 31 Mar 2015
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Register NS shared memory for SP's activity logs and TA sessions
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This patch registers NS memory buffer with the secure payload using
two different functions IDs - REGISTER_LOGBUF, REGISTER_REQBUF.
a. The SP uses the log-buffer to store its activity logs, in a
pre-decided format. This helps in debugging secure payload's issues.
b. The SP uses the req-buffer to get the parameters required by
sessions with Trusted Applications.
Change-Id: I6b0247cf7790524132ee0da24f1f35b1fccec5d5
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 31 Mar 2015
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Add TLK Dispatcher (tlkd) based on the Test Dispatcher (tspd)
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TLK Dispatcher (tlkd) is based on the tspd and is the glue required
to run TLK as a Secure Payload with the Trusted Firmware.
Change-Id: I69e573d26d52342eb049feef773dd7d2a506f4ab
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Varun Wadekar
committed
on 31 Mar 2015
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2015-03-27 |
Remove the `owner` field in bakery_lock_t data structure
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This patch removes the `owner` field in bakery_lock_t structure which
is the data structure used in the bakery lock implementation that uses
coherent memory. The assertions to protect against recursive lock
acquisition were based on the 'owner' field. They are now done based
on the bakery lock ticket number. These assertions are also added
to the bakery lock implementation that uses normal memory as well.
Change-Id: If4850a00dffd3977e218c0f0a8d145808f36b470
Soby Mathew
committed
on 27 Mar 2015
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Optimize the bakery lock structure for coherent memory
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This patch optimizes the data structure used with the bakery lock
implementation for coherent memory to save memory and minimize memory
accesses. These optimizations were already part of the bakery lock
implementation for normal memory and this patch now implements
it for the coherent memory implementation as well. Also
included in the patch is a cleanup to use the do-while loop while
waiting for other contenders to finish choosing their tickets.
Change-Id: Iedb305473133dc8f12126726d8329b67888b70f1
Soby Mathew
committed
on 27 Mar 2015
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2015-03-26 |
Bug Fix: Fix checkpatch rule in Makefile
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The shell command used to list all files but the libc's ones
introduced in commit 95d5353c33 was incorrect. It was listing
subdirectories without referencing their parent directories.
This patch fixes it.
Also, the command used to invoke the checkpatch.pl script is now
printed when V=1.
Change-Id: Ie2f1e74f60d77e38c25e717cffa44ca03baec7b2
Sandrine Bailleux
committed
on 26 Mar 2015
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Merge pull request #274 from sandrine-bailleux/sb/juno-r1
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Add support for Juno r1 in the platform reset handler
achingupta
committed
on 26 Mar 2015
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Merge pull request #273 from achingupta/ag/genfw-389
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Set group status of PPIs and SGIs correctly on GICv3 systems
achingupta
committed
on 26 Mar 2015
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2015-03-24 |
Add support for Juno r1 in the platform reset handler
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For Juno r0, the platform reset handler needs to:
- Implement the workaround for defect #831273
- Increase the L2 Data and Tag RAM latencies for Cortex-A57.
Defect #831273 does not affect Juno r1. Also, the default value
for the L2 Tag RAM latency for Cortex-A57 is suitable on Juno r1.
The L2 Data RAM latency for Cortex-A57 still needs to be
increased, though.
This patch modifies the Juno platform reset handler to detect
the board revision and skip the unnecessary steps on Juno r1.
The behaviour on Juno r0 is unchanged.
Change-Id: I27542917223e680ef923ee860900806ffcd0357b
Sandrine Bailleux
committed
on 24 Mar 2015
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2015-03-20 |
Set group status of PPIs and SGIs correctly on GICv3 systems
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On a GICv2 system, the group status of PPIs and SGIs is set in the GICD_IGROUPR0
register. On a GICv3 system, if affinity routing is enabled for the non-secure
state, then the group status of PPIs and SGIs should be set in the GICR_IGROUPR0
register. ARM Trusted firmware sets the group status using the GICv2
sequence. On a GICv3 system, if the group status of an interrupt is set to Group
1 through a write to the GICD_IGROUPR0, then the GICR_IGROUPR0 is updated as
well.
The current sequence is incorrect since it first marks all PPIs and SGIs as
Group 1. It then clears the bits in GICD_IGROUPR0 corresponding to secure
interrupts to set their group status to Group 0. This operation is a no-op. It
leaves the secure generic timer interrupt (#29) used by the TSP marked as Group
1. This causes the interrupt to interfere with the execution of non-secure
software. Once an interrupt has been marked as Group 1, the GICR_IGROUPR0 should
be programmed to change its group status.
This patch rectifies this issue by setting the group status of only the
non-secure PPI and SGIs to Group 1 in the first place. GICD_IGROUPR0 resets to
0. So secure interrupts are marked as Group 0 by default.
Change-Id: I958b4b15f3e2b2444ce4c17764def36216498d00
Achin Gupta
committed
on 20 Mar 2015
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2015-03-19 |
Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support
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Add support for ARM Cortex-A72 processor
danh-arm
committed
on 19 Mar 2015
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2015-03-18 |
Add support for ARM Cortex-A72 processor
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This patch adds support for ARM Cortex-A72 processor in the CPU
specific framework.
Change-Id: I5986855fc1b875aadf3eba8c36e989d8a05e5175
Vikram Kanigiri
committed
on 18 Mar 2015
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2015-03-17 |
Merge pull request #263 from jcastillo-arm/jc/tbb_sha256_int
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TBB: remove PolarSSL SHA1 functions from the binary
danh-arm
committed
on 17 Mar 2015
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Merge pull request #269 from vikramkanigiri/vk/common-cci
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Common driver for ARM cache coherent Interconnects
danh-arm
committed
on 17 Mar 2015
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Merge pull request #268 from vikramkanigiri/vk/move_init_cpu_ops
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Initialise cpu ops after enabling data cache
danh-arm
committed
on 17 Mar 2015
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Merge pull request #267 from sandrine-bailleux/sb/doc-fixes
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Documentation fixes in 'make help' message and User Guide
danh-arm
committed
on 17 Mar 2015
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Merge pull request #266 from sandrine-bailleux/sb/juno-disable-errata-806969
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Juno: Disable workaround for Cortex-A57 erratum #806969
danh-arm
committed
on 17 Mar 2015
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Merge pull request #264 from jcastillo-arm/jc/tbb_fip_dep
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TBB: fix build target 'all' dependency on certificates
danh-arm
committed
on 17 Mar 2015
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Merge pull request #262 from sandrine-bailleux/sb/check-format-printf
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Enable type-checking of arguments passed to printf() et al.
danh-arm
committed
on 17 Mar 2015
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Merge pull request #265 from jcastillo-arm/jc/git_commit_id
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checkpatch: ignore GIT_COMMIT_ID
danh-arm
committed
on 17 Mar 2015
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2015-03-16 |
Use ARM CCI driver on FVP and Juno platforms
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This patch updates the FVP and Juno platform ports to use the common
driver for ARM Cache Coherent Interconnects.
Change-Id: Ib142f456b9b673600592616a2ec99e9b230d6542
Vikram Kanigiri
committed
on 16 Mar 2015
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