2018-07-11 |
Use clang as preprocessor when clang toolchain is selected
...
Change-Id: I562c5de91e12fe384245df41225dfb9122a13a85
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Use clang assembler when clang compiler is used
...
Change-Id: Ib90b767e46360ef07c1f22526e3f3eb5fe366d5d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Remove integrity check in declare_cpu_ops_base
...
This check was added to ensure the correct behaviour of fill_constants
macro. This macro has been verified and it is known his correct
behaviour. The check generates an error when the clang assembler is
used, so it is better to remove the check.
Change-Id: I3447ff9e9e5ee5cf0502f65e53c3d105d9396b8b
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Remove .struct directive
...
This directive is not implemented by clang assembler. The traditional
way to implement structs in assembly is using two macros for every field,
one for the offset, and another one for the size. For every field, the
offset can be calculated using the size and offset of the previous field.
Change-Id: Iacc6781e8f302fb925898737b8e85ab4e88a51cc
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Remove string concatenation in assembler files
...
Clang assembler doesn't support concatenation of adjacent strings.
Change-Id: I092a1e30c137d431c6adcc13519fc2d595f92f14
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Add end_vector_entry assembler macro
...
Check_vector_size checks if the size of the vector fits
in the size reserved for it. This check creates problems in
the Clang assembler. A new macro, end_vector_entry, is added
and check_vector_size is deprecated.
This new macro fills the current exception vector until the next
exception vector. If the size of the current vector is bigger
than 32 instructions then it gives an error.
Change-Id: Ie8545cf1003a1e31656a1018dd6b4c28a4eaf671
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Remove .func and .endfunc assembler directives
...
These directives are only used when stabs debugging information
is used, but we use ELF which uses DWARF debugging information.
Clang assembler doesn't support these directives, and removing
them makes the code more compatible with clang.
Change-Id: I2803f22ebd24c0fe248e04ef1b17de9cec5f89c4
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Allow overriding the linker
...
This patch allows the user to override the value of the LD Makefile
variable. This feature can be used to force the use of the new Clang
linker.
Change-Id: I97ffeb18e48fa75346702a479d7dc1e8abcb3621
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Add .extab and .exidx sections
...
These sections are required by clang when the code is compiled for
aarch32. These sections are related to the unwind of the stack in
exceptions, but in the way that clang defines and uses them, the
garbage collector cannot get rid of them.
Change-Id: I085efc0cf77eae961d522472f72c4b5bad2237ab
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Use ALIGN instead of NEXT in linker scripts
...
Clang linker doesn't support NEXT. As we are not using the MEMORY command
to define discontinuous memory for the output file in any of the linker
scripts, ALIGN and NEXT are equivalent.
Change-Id: I867ffb9c9a76d4e81c9ca7998280b2edf10efea0
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
Add documentation about clang version supported
...
The user guide didn't contain any information about the
requirements of the clang version needed by TF, which is
at least 4.0.
Change-Id: I1ea120aca0fb2c0950fbeaf6978c654ec277afde
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 11 Jul 2018
|
2018-07-06 |
Merge pull request #1463 from grandpaul/paulliu-rpi3-tbb0
...
rpi3: Add support for Trusted Board Boot
Dimitris Papastamos
authored
on 6 Jul 2018
GitHub
committed
on 6 Jul 2018
|
2018-07-05 |
Merge pull request #1465 from Andre-ARM/allwinner/h6-support
...
allwinner: Add H6 SoC support
Dimitris Papastamos
authored
on 5 Jul 2018
GitHub
committed
on 5 Jul 2018
|
docs: rpi3: add description for Trusted Board Boot
...
Add paragraph for how to enable Trusted Board Boot for rpi3
Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Ying-Chun Liu (PaulLiu)
committed
on 5 Jul 2018
|
docs: rpi3: fix the size of BL1
...
For Trusted Board Boot we enlarge the BL1 size from 64k to 128k.
Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Ying-Chun Liu (PaulLiu)
committed
on 5 Jul 2018
|
rpi3: Add support for Trusted Board Boot
...
This patch adds support for TBB to rpi3. The ROTPK is generated at build
time and is included into BL1/BL2. The key and content certificates are
read over semihosting.
Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Ying-Chun Liu (PaulLiu)
committed
on 5 Jul 2018
|
2018-07-04 |
Merge pull request #1461 from antonio-nino-diaz-arm/an/xlat-docs
...
xlat v2: Update documentation
Dimitris Papastamos
authored
on 4 Jul 2018
GitHub
committed
on 4 Jul 2018
|
Merge pull request #1396 from ruchi393/multiple_fip
...
Extend FIP io driver to support multiple FIP devices
Dimitris Papastamos
authored
on 4 Jul 2018
GitHub
committed
on 4 Jul 2018
|
maintainers: allwinner: add missing link to github page
...
A proper link to Samuel's github page was missing. Add this to make
the link actually work.
Change-Id: I68b116935bf045df60b2e9309b5fd58a1c694d47
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara
committed
on 4 Jul 2018
|
Merge pull request #1462 from sandrine-bailleux-arm/topics/sb/no-unaligned-access
...
Fixes related to unaligned accesses
Dimitris Papastamos
authored
on 4 Jul 2018
GitHub
committed
on 4 Jul 2018
|
2018-07-03 |
allwinner: Add Allwinner H6 SoC support
...
The H6 is Allwinner's most recent SoC. It shares most peripherals with the
other ARMv8 Allwinner SoCs (A64/H5), but has a completely different memory
map.
Introduce a separate platform target, which includes a different header
file to cater for the address differences. Also add the new build target
to the documentation.
The new ATF platform name is "sun50i_h6".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara
committed
on 3 Jul 2018
|
Fix incorrect pointer conversion in SMC_UUID_RET()
...
Casting a pointer to a struct uuid into a pointer to uint32_t may
result in a pointer that is not correctly aligned, which constitutes
an undefined behaviour. In the case of TF, this also generates a data
abort because alignment fault checking is enabled (through the SCTLR.A
bit).
This patch modifies the SMC_UUID_RET() macro to read the uuid
structure without any pointer aliasing. A helper function then
combines every set of 4 bytes into a 32-bit value suitable to be
returned through the x0-x3 registers.
This fixes a violation of MISRA rule 11.3.
Change-Id: I53ee73bb4cb332f4d8286055ceceb6f347caa080
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Sandrine Bailleux
committed
on 3 Jul 2018
|
AArch32: Force compiler to align memory accesses
...
Alignment fault checking is always enabled in TF (by setting the
SCTLR.A bit). Thus, all instructions that load or store one or more
registers have an alignment check that the address being accessed is
aligned to the size of the data element(s) being accessed. If this
check fails it causes an Alignment fault, which is taken as a Data
Abort exception.
The compiler needs to be aware that it must not emit load and store
instructions resulting in unaligned accesses. It already is for
AArch64 builds (see commit fa1d37122c "Add -mstrict-align to the gcc
options"), this patch does the same for AArch32 builds.
Change-Id: Ic885796bc6ed0ff392aae2d49f3a13f517e0169f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Sandrine Bailleux
committed
on 3 Jul 2018
|
xlat v2: Update documentation
...
Update documentation to reflect the current state of the library.
Change-Id: Ic72f90ee322d2ebd6ea7f4296315700d6bc434e6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 3 Jul 2018
|
Merge pull request #1459 from antonio-nino-diaz-arm/an/xlat-refactor
...
Refactor of the xlat tables v2 library
Dimitris Papastamos
authored
on 3 Jul 2018
GitHub
committed
on 3 Jul 2018
|
Merge pull request #1458 from Andre-ARM/allwinner/fixes
...
allwinner: various smaller fixes
Dimitris Papastamos
authored
on 3 Jul 2018
GitHub
committed
on 3 Jul 2018
|
Merge pull request #1447 from Amit-Radur/bl32_v1
...
allwinner: Add BL32 (corresponds to Trusted OS) support
Dimitris Papastamos
authored
on 3 Jul 2018
GitHub
committed
on 3 Jul 2018
|
xlat v2: Make get/set attrs functions less verbose
...
It is useful to have LOG_LEVEL_VERBOSE because it prints the memory map
of each image, but that also means that the change_mem_attributes and
get_mem_attributes functions have verbose prints, and generate a too
long text output that hides other useful information.
As they were mostly there for debug purposes, this patch removes them.
Change-Id: I2986537377d1f78be2b79cc8a6cf230c380bdb55
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 3 Jul 2018
|
xlat v2: Clean debug xlat tables descriptor print
...
The previous debug output for EL1&0 translation regimes was too verbose,
which makes it hard to read and hides the intent behind the parameters
assigned to each region. This patch simplifies this output and makes the
outputs for EL3 and EL1&0 mostly the same. The difference is that in
EL1&0 it is specified whether the region is exclusively accessible from
EL1 (PRIV) or both EL0 and EL1 (USER).
For example:
MEM-RW(PRIV)-NOACCESS(USER)-XN(PRIV)-XN(USER)-S
MEM-RO(PRIV)-NOACCESS(USER)-EXEC(PRIV)-EXEC(USER)-S
After the change, it becomes this:
MEM-RW-XN-PRIV-S
MEM-RO-EXEC-PRIV-S
Change-Id: I15f4b99058429d42107fbf89e15f4838a9b559a5
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 3 Jul 2018
|
xlat v2: Split code into separate files
...
Instead of having one big file with all the code, it's better to have
a few smaller files that are more manageable:
- xlat_tables_core.c: Code related to the core functionality of the
library (map and unmap regions, initialize xlat context).
- xlat_tables_context.c: Instantiation of the active image context
as well as APIs to manipulate it.
- xlat_tables_utils.c: Helper code that isn't part of the core
functionality (change attributes, debug print messages).
Change-Id: I3ea956fc1afd7473c0bb5e7c6aab3b2e5d88c711
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 3 Jul 2018
|