tlkd: support new TLK SMCs ...

This patch adds support to handle following TLK SMCs:
{TLK_SS_REGISTER_HANDLER, TLK_REGISTER_NS_DRAM_RANGES, TLK_SET_ROOT_OF_TRUST}

These SMCs need to be supported in ATF in order to forward them to
TLK. Otherwise, these functionalities won't work.

Brief:
TLK_SS_REGISTER_HANDLER: This SMC is issued by TLK Linux Driver to
set up secure storage buffers.

TLK_REGISTER_NS_DRAM_RANGES: Cboot performs this SMC during boot to
pass NS memory ranges to TLK.

TLK_SET_ROOT_OF_TRUST: Cboot performs this SMC during boot to pass
Verified Boot parameters to TLK.

Change-Id: I18af35f6dd6f510dfc22c1d1d1d07f643c7b82bc
Reviewed-on: https://git-master.nvidia.com/r/1643851
Signed-off-by: Mihir Joshi <mihirj@nvidia.com>

Tegra: fiq_glue: support to handle LEGACY_FIQ PPIs for Tegra SoCs ...

This patch adds support to handle secure PPIs for Tegra watchdog timers. This
functionality is currently protected by the ENABLE_WDT_LEGACY_FIQ_HANDLING
configuration variable and is only enabled for Tegra210 platforms, for now.

Change-Id: I0752ef54a986c58305e1bc8ad9be71d4a8bbd394
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: flowctrl: support to enable/disable WDT's legacy FIQ routing ...

On earlier Tegra platforms, e.g. Tegra210, the watchdog timer's FIQ interrupt
is not direclty wired to the GICD. It goes to the flow controller instead, for
power state management. But the flow controller can route the FIQ to the GICD,
as a PPI, which can then get routed to the target CPU.

This patch adds routines to enable/disable routing the legacy FIQ used by
the watchdog timers, to the GICD.

Change-Id: Idd07c88c8d730b5f0e93e3a6e4fdc59bdcb2161b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: SiP: set GPU in reset after vpr resize ...

Whenever the VPR memory is resized, the GPU is put into reset first
and then the new VPR parameters are programmed to the memory controller
block. There exists a scenario, where the GPU might be out before we
program the new VPR parameters. This means, the GPU would still be
using older settings and leak secrets.

This patch puts the GPU back into reset, if it is out of reset after
resizing VPR, to mitigate this hole.

Change-Id: I38a1000e3803f80909efcb02e27da4bd46909931
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>

Tegra: handle FIQ interrupts when NS handler is not registered ...

This patch updates the secure interrupt handler to mark the interrupt
as complete in case the NS world has not registered a handler.

Change-Id: Iebe952305f7db46375303699b6150611439475df
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: bpmp_ipc: support to enable/disable module clocks ...

This patch adds support to the bpmp_ipc driver to allow clients to
enable/disable clocks to hardware blocks. Currently, the API only
supports SE devices.

Change-Id: I9a361e380c0bcda59f5a92ca51c86a46555b2e90
Signed-off-by: steven kao <skao@nvidia.com>

Tegra: fix offset used to dump GICD registers from crash handler ...

The GICD registers are 32-bits wide whereas the crash handler was reading
them as 64-bit ones. This patch fixes the code to read the GICD registers,
32-bits at a time, from the paltform's crash handler.

Change-Id: If3d6608529684ecc02be6a1b715012310813b2a4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: default platform handler for the CPU_STANDBY state ...

This patch adds a default implementation for the platform specific
CPU standby power handler. Tegra SoCs can override this handler
with their own implementations.

Change-Id: I91e513842f194b1e2b1defa2d833bb4d9df5f06b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra186: smmu: add support for backup multiple smmu regs ...

Modifying smmu macros to pass base address of smmu so that it can be
used with multiple smmus.

Added macro for combining smmu backup regs that can be used for multiple
smmus.

Change-Id: I4f3bb83d66d5df14a3b91bc82f7fc26ec8e4592e
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

Merge pull request #1798 from pbeesley-arm/pb/fix-code-style ...

doc: Fix broken code blocks in coding guidelines

doc: Fix broken code blocks in coding guidelines ...

Sections 2.2, 2.3 and 2.4 contained example code blocks that were not
being formatted properly due to missing newlines.

Change-Id: I0dbce90c931cf69e4f47d2ccbcc8bc0e20f8fd66
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Merge pull request #1797 from antonio-nino-diaz-arm/an/remove-smccc-v2 ...

Remove support for the SMC Calling Convention 2.0

Merge pull request #1745 from svenauhagen/bugfix/a8k ...

Armada8k GPIO Register macro fix

Merge pull request #1793 from marex/arm/master/fixes-v2.0.0 ...

Arm/master/fixes v2.0.0

Merge pull request #1792 from satheesbalya-arm/sb1/sb1_2159_v84_xlat ...

lib/xlat_tables: Add support for ARMv8.4-TTST

Merge pull request #1795 from pbeesley-arm/pb/code-style ...

Move coding guidelines into docs directory

Merge pull request #1753 from Yann-lms/emmc_ret ...

mmc: correctly check ret in mmc_fill_device_info

Remove support for the SMC Calling Convention 2.0 ...

This reverts commit 2f370465241c ("Add support for the SMC Calling
Convention 2.0").

SMCCC v2.0 is no longer required for SPM, and won't be needed in the
future. Removing it makes the SMC handling code less complicated.

The SPM implementation based on SPCI and SPRT was using it, but it has
been adapted to SMCCC v1.0.

Change-Id: I36795b91857b2b9c00437cfbfed04b3c1627f578
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

lib/xlat_tables: Add support for ARMv8.4-TTST ...

ARMv8.4-TTST (Small Translation tables) relaxes the lower limit on the
size of translation tables by increasing the maximum permitted value
of the T1SZ and T0SZ fields in TCR_EL1, TCR_EL2, TCR_EL3, VTCR_EL2 and
VSTCR_EL2.

This feature is supported in AArch64 state only.

This patch adds support for this feature to both versions of the
translation tables library. It also removes the static build time
checks for virtual address space size checks to runtime assertions.

Change-Id: I4e8cebc197ec1c2092dc7d307486616786e6c093
Signed-off-by: Sathees Balya <sathees.balya@arm.com>

Merge pull request #1791 from antonio-nino-diaz-arm/an/rk-gic ...

rockchip: Fix GICv2 interrupts

Merge pull request #1789 from Anson-Huang/lpm ...

Add power optimization for i.MX8QM/i.MX8QX

Merge pull request #1788 from laroche/rpi3_duplicate_initialization ...

rpi3: Remove duplicate initialization for BL32_IMAGE_ID and mark one more function as static.

Merge pull request #1786 from laroche/static_vars_functions ...

Change some vars and functions to be static.

Merge pull request #1794 from Andre-ARM/fiptool-fix ...

tools/fiptool: Fix UUID parsing in blob handling

doc: Add details on #include ordering ...

This patch adds more details on #include directive use, including (pun
not intended) the desired ordering, grouping and variants (<> or "").

Change-Id: Ib024ffc4d3577c63179e1bbc408f0d0462026312
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Reorder coding guidelines document ...

This patch attempts to make the guidelines clearer by reordering
the sections and grouping similar topics.

Change-Id: I1418d6fc060d6403fe3e1978f32fd54b8793ad5b
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Link coding guidelines to user guide ...

Adds a link from user-guide.rst to coding-guidelines.rst and merges
the information about using checkpatch from both files into the user
guide document.

Change-Id: Iffbb4225836a042d20024faf28b8bdd6b2c4043e
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Clarify ssize_t use in coding guidelines ...

Change-Id: I083f673f37495d2e53c704a43a0892231b6eb281
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Add AAPCS link to coding guidelines ...

Change-Id: Id0e6d272b6d3d37eab785273f9c12c093191f3fc
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Add Coding Guidelines document ...

This content has been imported and adapted from the TF GitHub wiki
article 'ARM-Trusted-Firmware-Coding-Guidelines'.

The aim is to increase the visibility of the coding guidelines by
including them as part of the documentation that is within the TF
repository.

Additionally, the documentation can then be linked to by other
documents in the docs/ directory without worrying about broken links
to, for example, the external wiki.

Change-Id: I9d8cd6b5117b707c1a113baeba7fc5e1b4bf33bc
Signed-off-by: Paul Beesley <paul.beesley@arm.com>