| 2016-06-15 |
zynqmp: Add option to select between Cadence UARTs
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Add build time option 'cadence1' for ZYNQMP_CONSOLE to select the 2nd
UART available in the SoC.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann
committed
on 15 Jun 2016
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| 2016-06-13 |
build_macros: Add 'add_define_val' macro
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Add a convenience macro to add a build definition with a value.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Soren Brinkmann
committed
on 13 Jun 2016
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| 2016-06-07 |
zynqmp: pm: Added NODE_IPI_APU slave node ID in pm_defs.h
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NODE_IPI_APU is the node ID of APU's IPI device. If APU should be
woken-up on an IPI from FPD power down, this node shall be set as
the wake-up source upon suspend.
Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Mirela Simonovic
authored
on 7 Jun 2016
Soren Brinkmann
committed
on 7 Jun 2016
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| 2016-05-29 |
zynqmp: Remove double ';'
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Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Soren Brinkmann
committed
on 29 May 2016
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zynqmp: Fix spelling of endianness
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Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Soren Brinkmann
committed
on 29 May 2016
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| 2016-05-25 |
zynqmp: PSCI: Wait for FW completing wake requests
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Powering up cores didn't wait for the PMUFW to complete the request,
which could result in cores failing to power up in Linux.
Reported-by: Koteswararao Nayudu <kotin@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Soren Brinkmann
committed
on 25 May 2016
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zynqmp: Ignore the revision field of the IDCODE
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The revision field may change between silicon revisions without changing
the mapping to a part. This avoids errors like:
ERROR: Incorrect XILINX IDCODE 0x14738093, maskid 0x4600093
NOTICE: ATF running on XCZUUNKN/EP108 v3/RTL5.1 at 0xfffe5000
on parts with a newer revision.
Reported-by: Love Kumar <love.kumar@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
Tested-by: Love Kumar <love.kumar@xilinx.com>
Soren Brinkmann
committed
on 25 May 2016
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| 2016-05-24 |
zynqmp: Add bakery_lock to protect APU_PWRCTRL register access
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Access to APU_PWRCTRL register is protected during suspend/wakeup pocedure
in order to save valid state. If more than one CPU is accessing this register
it can be left in corrupted state during read-modify-write process.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Stefan Krsmanovic
authored
on 20 May 2016
Soren Brinkmann
committed
on 24 May 2016
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zynqmp: Put pm_secure_lock in coherent memory region
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DEFINE_BAKERY_LOCK() macro is used to put lock in coherent memory region.
ARM Trusted Firmware design guide, chapter 11 states that bakery_lock data
structures should be allocated in coherent memory region because it is
accessed by multiple CPUs with mismatched shareability, cacheability and
memory attributes.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Stefan Krsmanovic
authored
on 20 May 2016
Soren Brinkmann
committed
on 24 May 2016
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zynqmp: pm: Implement pm_register_notifier PM API function
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Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Anes Hadziahmetagic
authored
on 12 May 2016
Soren Brinkmann
committed
on 24 May 2016
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zynqmp: pm: Implemented 'get_op_characteristic' PM API call
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Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Anes Hadziahmetagic
authored
on 12 May 2016
Soren Brinkmann
committed
on 24 May 2016
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zynqmp: pm: Removed double declaration of pm_ipi_send functions
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Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Filip Drazic
authored
on 12 May 2016
Soren Brinkmann
committed
on 24 May 2016
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zynqmp: Reduce mapped memory area
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The GIC area is specified larger than it needs to be and can be reduced.
Which allows reducing the structures required for the translation tables
as well.
This results in a reduction of memory footprint of ca. 4k.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann
committed
on 24 May 2016
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| 2016-04-25 |
zynqmp: FSBL->ATF handover
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Parse the parameter structure the FSBL populates, to populate the bl32
and bl33 image structures.
Cc: Sarat Chand Savitala <saratcha@xilinx.com>
Cc: petalinux-dev@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[ SB
- pass pointers to structs instead of structs
- handle execution state parameter
- populate bl32 SPSR
- add documentation
- query bootmode and consider missing handoff parameters an error when
not in JTAG boot mode
]
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Michal Simek
authored
on 15 Jun 2015
Soren Brinkmann
committed
on 25 Apr 2016
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zynqmp: Introduce zynqmp_get_bootmode
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Provide a function to retrieve the bootmode.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann
committed
on 25 Apr 2016
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zynqmp: Remove bogus comment
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Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann
committed
on 25 Apr 2016
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zynqmp: Revise memory configuration options
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Drop the current configuration options for selecting the location of
the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION).
The new configuration provides one default setup (ATF in OCM,
BL32 in DRAM). Additionally, the new configuration options
- ZYNQMP_ATF_MEM_BASE
- ZYNQMP_ATF_MEM_SIZE
- ZYNQMP_BL32_MEM_BASE
- ZYNQMP_BL32_MEM_SIZE
can be used to freely configure the memory locations used for ATF and
secure payload.
Also, allow setting the BL33 entry point via PRELOADED_BL33_BASE.
Cc: petalinux-dev@xilinx.com
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>
Soren Brinkmann
committed
on 25 Apr 2016
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| 2016-04-18 |
context: Fix typo in comment
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Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Soren Brinkmann
committed
on 18 Apr 2016
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zynqmp: ipi: Consolidate IRQ #defines
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The bit mapping in I(E|D|S)R are equal, consolidate the #defines.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann
committed
on 18 Apr 2016
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zynqmp: Remove unused/redundant #includes
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Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann
committed
on 18 Apr 2016
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| 2016-04-14 |
Merge pull request #549 from ljerry/tf_issue_373
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Allow to dump platform-defined regs in crash log
danh-arm
committed
on 14 Apr 2016
|
Dump platform-defined regs in crash reporting
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It is up to the platform to implement the new plat_crash_print_regs macro to
report all relevant platform registers helpful for troubleshooting.
plat_crash_print_regs merges or calls previously defined plat_print_gic_regs
and plat_print_interconnect_regs macros for each existing platforms.
NOTE: THIS COMMIT REQUIRES ALL PLATFORMS THAT ENABLE THE `CRASH_REPORTING`
BUILD FLAG TO MIGRATE TO USE THE NEW `plat_crash_print_regs()` MACRO. BY
DEFAULT, `CRASH_REPORTING` IS ENABLED IN DEBUG BUILDS FOR ALL PLATFORMS.
Fixes: arm-software/tf-issues#373
Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>
Gerald Lejeune
committed
on 14 Apr 2016
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Merge pull request #593 from mtk09422/mtcmos-fix
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mt8173: Fix timing issue of mfg mtcmos power off
danh-arm
committed
on 14 Apr 2016
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Merge pull request #591 from soby-mathew/sm/xlat_common
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Refactor the xlat_tables library
danh-arm
committed
on 14 Apr 2016
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mt8173: Fix timing issue of mfg mtcmos power off
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In mt8173, there are totally 10 non-cpu mtcmos, so we cannot tell
if SPM finished the power control flow by 10 status bits of PASR_PDP_3.
So, extend PASR_PDP_3 status bits from 10 to 20 so that we can
make sure if the control action has been done precisely.
Change-Id: Ifd4faaa4173c6e0543aa8471149adb9fe7fadedc
Signed-off-by: Fan Chen <fan.chen@mediatek.com>
Fan Chen
authored
on 1 Apr 2016
Yidi Lin
committed
on 14 Apr 2016
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| 2016-04-13 |
Migrate platform ports to the new xlat_tables library
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This patch modifies the upstream platform port makefiles to use the new
xlat_tables library files. This patch also makes mmap region setup common
between AArch64 and AArch32 for FVP platform port. The file `fvp_common.c`
is moved from the `plat/arm/board/fvp/aarch64` folder to the parent folder
as it is not specific to AArch64.
Change-Id: Id2e9aac45e46227b6f83cccfd1e915404018ea0b
Soby Mathew
committed
on 13 Apr 2016
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Refactor the xlat_tables library code
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The AArch32 long descriptor format and the AArch64 descriptor format
correspond to each other which allows possible sharing of xlat_tables
library code between AArch64 and AArch32. This patch refactors the
xlat_tables library code to seperate the common functionality from
architecture specific code. Prior to this patch, all of the xlat_tables
library code were in `lib/aarch64/xlat_tables.c` file. The refactored code
is now in `lib/xlat_tables/` directory. The AArch64 specific programming
for xlat_tables is in `lib/xlat_tables/aarch64/xlat_tables.c` and the rest
of the code common to AArch64 and AArch32 is in
`lib/xlat_tables/xlat_tables_common.c`. Also the data types used in
xlat_tables library APIs are reworked to make it compatible between AArch64
and AArch32.
The `lib/aarch64/xlat_tables.c` file now includes the new xlat_tables
library files to retain compatibility for existing platform ports.
The macros related to xlat_tables library are also moved from
`include/lib/aarch64/arch.h` to the header `include/lib/xlat_tables.h`.
NOTE: THE `lib/aarch64/xlat_tables.c` FILE IS DEPRECATED AND PLATFORM PORTS
ARE EXPECTED TO INCLUDE THE NEW XLAT_TABLES LIBRARY FILES IN THEIR MAKEFILES.
Change-Id: I3d17217d24aaf3a05a4685d642a31d4d56255a0f
Soby Mathew
committed
on 13 Apr 2016
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Merge pull request #590 from yatharth-arm/yk/tzc400
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Use unsigned long long instead of uintptr_t in TZC400/DMC500 drivers
danh-arm
committed
on 13 Apr 2016
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| 2016-04-12 |
Use unsigned long long instead of uintptr_t in TZC400/DMC500 drivers
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Currently the `tzc400_configure_region` and `tzc_dmc500_configure_region`
functions uses uintptr_t as the data type for `region_top` and `region_base`
variables, which will be converted to 32/64 bits for AArch32/AArch64
respectively. But the expectation is to keep these addresses at least 64 bit.
This patch modifies the data types to make it at least 64 bit by using
unsigned long long instead of uintptr_t for the `region_top` and
`region_base` variables. It also modifies the associated macros
`_tzc##fn_name##_write_region_xxx` accordingly.
Change-Id: I4e3c6a8a39ad04205cf0f3bda336c3970b15a28b
Yatharth Kochar
committed
on 12 Apr 2016
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Merge pull request #589 from soby-mathew/sm/fix_rk_build_err
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Fix build error in Rockchip platform
danh-arm
committed
on 12 Apr 2016
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