2020-12-27 |
fdts: stm32mp157ca-dk1: Support using PLL4 as Ethernet clock
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This enables the internal Ethernet clock and sets PLL4 to 750Mhz so
operating systems can clock PLL4_P to 125MHz and use it for Ethernet.
Jookia
committed
on 27 Dec 2020
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stm32mp1: add low power management
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Change-Id: I8e0ba794e5ded1290fb83fe8d43ce54d4dc0e320
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
authored
on 20 May 2019
Jookia
committed
on 27 Dec 2020
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fdts: stm32mp157ca-dk1: Use STPMIC on I2C2 and eMMC on SDMMC2
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Quick hack to get things working on the Seeed Odyssey board.
Jookia
committed
on 27 Dec 2020
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2019-10-03 |
fdts: stm32mp1: move FDCAN to PLL4_R
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LTDC modifies the clock frequency to adapt it to the display. Such
frequency change is not detected by the FDCAN driver that instead
caches the value at probe and pretends to use it later.
This change fixes the issue by moving the FDCAN to PLL4_R,
leaving the LTDC alone on PLL4_Q.
Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I8230868b2b5fd6deb6e3f9dc3911030d8d484c58
Antonio Borneo
authored
on 29 Jul 2019
Yann Gautier
committed
on 3 Oct 2019
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2019-06-17 |
fdts: stm32mp1: realign device tree files with internal devs
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Update DDR parameters to version 1.45.
Remove useless sdmmc1_dir_pins_b node.
Add USART3 and UART7 nodes.
Correct a PMIC value for USB regulator.
Add TIMER12, TIMER15, CRYP, HASH and USBOTG_HS nodes.
Update DTSI file for SDMMC compatible, but overwrite it with the former
name.
Move BSEC board_id node to boards DTS files, as this OTP is specific to
STMicroelectronics boards.
Change-Id: If4d2fe090c6a8368afe8e21e5ac70579911d3939
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 17 Jun 2019
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stm32mp1: add general SYSCFG management
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The system configuration controller is mainly used to manage
the compensation cell and other IOs and system related settings.
The SYSCFG driver is in charge of configuring masters on the interconnect,
IO compensation, low voltage boards, or pull-ups for boot pins.
All other configurations should be handled in Linux drivers requiring it.
Device tree files are also updated to manage vdd-supply regulator.
Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 17 Jun 2019
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2019-03-11 |
fdts: stm32mp1: add bsec node
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This node is added in a new file stm32mp157c-security.dtsi.
This node includes OTPs that should be shadowed and made readable
to non secure world.
Explicitly add status and secure-status, as these OTPs are accessible
by secure and non-secure world.
The stgen node is also moved to this file.
Change-Id: I3c89a01588d2e411fecfc44997e1c5df2fc37cad
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 11 Mar 2019
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2019-02-20 |
stm32mp1: add minimal support for co-processor Cortex-M4
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STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4.
The support for Cortex-M4 clocks is added when configuring the clock tree.
Some minimal security features to allow communications between A7 and M4
are also added.
Change-Id: I60417e244a476f60a2758f4969700b2684056665
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 20 Feb 2019
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2019-02-14 |
stm32mp1: introduce STM32MP1 discovery boards
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Add the device tree files to support the 2 discovery boards: DK1 & DK2.
Change-Id: I90b4797dc69bd0aab1b643a72c932ead48a03c1f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 14 Feb 2019
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