Add .extab and .exidx sections ...

These sections are required by clang when the code is compiled for
aarch32. These sections are related to the unwind of the stack in
exceptions, but in the way that clang defines and uses them, the
garbage collector cannot get rid of them.

Change-Id: I085efc0cf77eae961d522472f72c4b5bad2237ab
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

Use ALIGN instead of NEXT in linker scripts ...

Clang linker doesn't support NEXT. As we are not using the MEMORY command
to define discontinuous memory for the output file in any of the linker
scripts, ALIGN and NEXT are equivalent.

Change-Id: I867ffb9c9a76d4e81c9ca7998280b2edf10efea0
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

Add documentation about clang version supported ...

The user guide didn't contain any information about the
requirements of the clang version needed by TF, which is
at least 4.0.

Change-Id: I1ea120aca0fb2c0950fbeaf6978c654ec277afde
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

Merge pull request #1463 from grandpaul/paulliu-rpi3-tbb0 ...

rpi3: Add support for Trusted Board Boot

Merge pull request #1465 from Andre-ARM/allwinner/h6-support ...

allwinner: Add H6 SoC support

docs: rpi3: add description for Trusted Board Boot ...

Add paragraph for how to enable Trusted Board Boot for rpi3

Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>

docs: rpi3: fix the size of BL1 ...

For Trusted Board Boot we enlarge the BL1 size from 64k to 128k.

Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>

rpi3: Add support for Trusted Board Boot ...

This patch adds support for TBB to rpi3. The ROTPK is generated at build
time and is included into BL1/BL2. The key and content certificates are
read over semihosting.

Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>

Merge pull request #1461 from antonio-nino-diaz-arm/an/xlat-docs ...

xlat v2: Update documentation

Merge pull request #1396 from ruchi393/multiple_fip ...

Extend FIP io driver to support multiple FIP devices

maintainers: allwinner: add missing link to github page ...

A proper link to Samuel's github page was missing. Add this to make
the link actually work.

Change-Id: I68b116935bf045df60b2e9309b5fd58a1c694d47
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Merge pull request #1462 from sandrine-bailleux-arm/topics/sb/no-unaligned-access ...

Fixes related to unaligned accesses

allwinner: Add Allwinner H6 SoC support ...

The H6 is Allwinner's most recent SoC. It shares most peripherals with the
other ARMv8 Allwinner SoCs (A64/H5), but has a completely different memory
map.

Introduce a separate platform target, which includes a different header
file to cater for the address differences. Also add the new build target
to the documentation.

The new ATF platform name is "sun50i_h6".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Fix incorrect pointer conversion in SMC_UUID_RET() ...

Casting a pointer to a struct uuid into a pointer to uint32_t may
result in a pointer that is not correctly aligned, which constitutes
an undefined behaviour. In the case of TF, this also generates a data
abort because alignment fault checking is enabled (through the SCTLR.A
bit).

This patch modifies the SMC_UUID_RET() macro to read the uuid
structure without any pointer aliasing. A helper function then
combines every set of 4 bytes into a 32-bit value suitable to be
returned through the x0-x3 registers.

This fixes a violation of MISRA rule 11.3.

Change-Id: I53ee73bb4cb332f4d8286055ceceb6f347caa080
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

AArch32: Force compiler to align memory accesses ...

Alignment fault checking is always enabled in TF (by setting the
SCTLR.A bit). Thus, all instructions that load or store one or more
registers have an alignment check that the address being accessed is
aligned to the size of the data element(s) being accessed. If this
check fails it causes an Alignment fault, which is taken as a Data
Abort exception.

The compiler needs to be aware that it must not emit load and store
instructions resulting in unaligned accesses. It already is for
AArch64 builds (see commit fa1d37122c "Add -mstrict-align to the gcc
options"), this patch does the same for AArch32 builds.

Change-Id: Ic885796bc6ed0ff392aae2d49f3a13f517e0169f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

xlat v2: Update documentation ...

Update documentation to reflect the current state of the library.

Change-Id: Ic72f90ee322d2ebd6ea7f4296315700d6bc434e6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1459 from antonio-nino-diaz-arm/an/xlat-refactor ...

Refactor of the xlat tables v2 library

Merge pull request #1458 from Andre-ARM/allwinner/fixes ...

allwinner: various smaller fixes

Merge pull request #1447 from Amit-Radur/bl32_v1 ...

allwinner: Add BL32 (corresponds to Trusted OS) support

xlat v2: Make get/set attrs functions less verbose ...

It is useful to have LOG_LEVEL_VERBOSE because it prints the memory map
of each image, but that also means that the change_mem_attributes and
get_mem_attributes functions have verbose prints, and generate a too
long text output that hides other useful information.

As they were mostly there for debug purposes, this patch removes them.

Change-Id: I2986537377d1f78be2b79cc8a6cf230c380bdb55
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

xlat v2: Clean debug xlat tables descriptor print ...

The previous debug output for EL1&0 translation regimes was too verbose,
which makes it hard to read and hides the intent behind the parameters
assigned to each region. This patch simplifies this output and makes the
outputs for EL3 and EL1&0 mostly the same. The difference is that in
EL1&0 it is specified whether the region is exclusively accessible from
EL1 (PRIV) or both EL0 and EL1 (USER).

For example:

    MEM-RW(PRIV)-NOACCESS(USER)-XN(PRIV)-XN(USER)-S
    MEM-RO(PRIV)-NOACCESS(USER)-EXEC(PRIV)-EXEC(USER)-S

After the change, it becomes this:

    MEM-RW-XN-PRIV-S
    MEM-RO-EXEC-PRIV-S

Change-Id: I15f4b99058429d42107fbf89e15f4838a9b559a5
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

xlat v2: Split code into separate files ...

Instead of having one big file with all the code, it's better to have
a few smaller files that are more manageable:

- xlat_tables_core.c: Code related to the core functionality of the
  library (map and unmap regions, initialize xlat context).
- xlat_tables_context.c: Instantiation of the active image context
  as well as APIs to manipulate it.
- xlat_tables_utils.c: Helper code that isn't part of the core
  functionality (change attributes, debug print messages).

Change-Id: I3ea956fc1afd7473c0bb5e7c6aab3b2e5d88c711
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1456 from robertovargas-arm/make_cert ...

make_cert: return error when invalid options are used

Merge pull request #1452 from glneo/fixups-for-k3 ...

Couple of fixups for K3 platform

Extend FIP io driver to support multiple FIP devices ...

Platform can define MAX_NUM_FIP_DEVICES in platform_def.h
to define the number of FIP io devices.

The FIP driver doesn't support muliple open file.
So only one single file can be open at a time across
multiple FIP devices.

For any FIP device, an image should be loaded
fully before moving on to the next image.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>

ti: k3: common: Enable interrupts before entering standby state ...

To wake a core from wfi interrupts must be enabled, in some cases they
may not be and so we can lock up here. Unconditionally enable interrupts
before wfi and then restore interrupt state.

Signed-off-by: Andrew F. Davis <afd@ti.com>

ti: k3: common: Add root domain node to platform topology ...

Actions may need to be taken by the last core when all clusters
have been shutdown. Add a top level root domain node to coordinate
this between clusters.

Signed-off-by: Andrew F. Davis <afd@ti.com>

allwinner: Add Samuel as second maintainer ...

As Samuel contributed most of the original code and he has an interest
in that, add him as a second maintainer for the Allwinner port.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Detect and output current SoC ...

So far we already support booting on two different SoCs, and we will
shortly add a third, so add some code to determine the current SoC type.
This can be later used to runtime detect certain properties.

Also print the SoC name to the console, to give valuable debug information.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

allwinner: Don't map boot ROM ...

There is nothing we need from the BootROM area, so we also don't need
to map it in EL3.

Remove the mapping and reduce the number of MMAP regions by one.

Reported-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>