LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

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2018-07-19	Unverified ba0248b Browse files » Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6 ... Marvell support for Armada 8K SoC family danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified 224e1ab Browse files » Merge pull request #1481 from antonio-nino-diaz-arm/an/xlat-refactor ... xlat: More refactoring danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
	Unverified 8ff0dfa Browse files » Merge pull request #1482 from sandrine-bailleux-arm/sb/fix-hcptr ... Misc arch.h fixes and cleanup danh-arm authored on 19 Jul 2018 GitHub committed on 19 Jul 2018
2018-07-18	486f868 Browse files » plat: marvell: Add common ARMADA platform components ... Add common Marvell ARMADA platform components. This patch also includes common components for Marvell ARMADA 8K platforms. Change-Id: I42192fdc6525a42e46b3ac2ad63c83db9bcbfeaf Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	f87e944 Browse files » marvell: drivers: Add i2c driver ... Add i2c driver for A8K SoC family. Change-Id: I5932b2fce286d84fc3ad5a74c4c456001faa3196 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	d5a6f86 Browse files » marvell: drivers: Add thermal driver ... Add thermal driver for A8K SoC family. The termal unit data is used by Marvell DRAM initialization code for optimizing the memory controller configuration Change-Id: Iad92689fa6e4224a89d872e9aa015393abd9cf73 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	152b0e4 Browse files » marvell: drivers: Add L3/system cache management drivers ... Add LLC (L3) cache management drivers for Marvell SoCs AP806, AP807 and AP810 Change-Id: Ic70710f9bc5b6b48395d62212df7011e2fbb5894 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	bc6206f Browse files » lib: cpu: Add L2 cache aux control register definition to CA72 ... Add definition of EL1 L2 Auxilary Control register to Cortex A72 library headers. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	031542f Browse files » marvell: drivers: Add MoChi drivers ... Add ModularChip and MCI drivers for A8K SoC family. ModularChip drivers include support for the internal building blocks of Marvell ARMADA SoCs - APN806, APN807 and CP110 Change-Id: I9559343788fa2e5eb47e6384a4a7d47408787c02 Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	c0474d5 Browse files » marvell: drivers: Add address decoding units drivers ... Add address decoding unit drivers for Marvell SoCs. Address decoding flow and address translation units chart are located at docs/marvell/misc/mvebu-a8k-addr-map.txt Change-Id: Id6ce311fa1f4f112df3adfac5d20449f495f71ed Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Konstantin Porotchkin committed on 18 Jul 2018
	e62ea09 Browse files » Fix HCPTR.TCP11 bit definition ... Change-Id: I98f23f6cebcf984b57efc5449b75ff702e1984a0 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 18 Jul 2018
	3039988 Browse files » Fix types of arch.h definitions ... Define the values as unsigned int or unsigned long long based on the actual size of the register. This prevents subtle issues caused by having a type that is too small. For example: #define OPTION_ENABLE 0x3 #define OPTION_SHIFT 32 uint64_t mask = OPTION_ENABLE << OPTION_SHIFT; Because OPTION_ENABLE fits in an int, the value is considered an int. This means that, after shifting it 32 places to the left, the final result is 0. The correct way to define the values is: #define OPTION_ENABLE ULL(0x3) #define OPTION_SHIFT U(32) In this case, the compiler is forced to use a 64 bit value from the start, so shifting it 32 places to the left results in the expected value. Change-Id: Ieaf2ffc2d8caa48c622db011f2aef549e713e019 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 18 Jul 2018
	0107aa4 Browse files » Add missing parentheses to macros in arch.h ... Change-Id: Ifea46da46d1bfd01b341acfad75df5bcab48a204 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 18 Jul 2018
	Unverified 344e403 Browse files » Merge pull request #1480 from sandrine-bailleux-arm/topics/sb/debug-macros ... Always compile debug macros Soby Mathew authored on 18 Jul 2018 GitHub committed on 18 Jul 2018
2018-07-15	1dd6c05 Browse files » xlat: Remove references to the Trusted Firmware ... This library can be used in other projects. All comments that talk about the Trusted Firmware should be talking about the library itself. Change-Id: I3b98d42f7132be72c1f8a4900acfaa78dbd2daa2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 15 Jul 2018
2018-07-15	63ddbae Browse files » xlat v2: Make setup_mmu_config public ... This allows other parts of the code to reuse it. No functional changes. Change-Id: Ib052ae235c422d9179958bd3016c3e678779ae9b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 15 Jul 2018
2018-07-13	Unverified 9ceda8b Browse files » Merge pull request #1477 from dp-arm/dp/css-ap-core ... CSS: Add support for SCMI AP core config protocol Dimitris Papastamos authored on 13 Jul 2018 GitHub committed on 13 Jul 2018
	6563c0b Browse files » xlat v2: Turn MMU parameters into 64-bit values ... Most registers are 64-bit wide, even in AArch32 mode: - MAIR_ELx is equivalent to MAIR0 and MAIR1. - TTBR is 64 bit in both AArch64 and AArch32. The only difference is the TCR register, which is 32 bit in AArch32 and in EL3 in AArch64. For consistency with the rest of ELs in AArch64, it makes sense to also have it as a 64-bit value. Change-Id: I2274d66a28876702e7085df5f8aad0e7ec139da9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 13 Jul 2018
	aa1d5f6 Browse files » xlat v2: Remove IMAGE_EL define ... The Exception Level is now detected at runtime. This means that it is not needed to hardcode the EL used by each image. This doesn't result in a substantial increase of the image size because the initialization functions that aren't used are garbage-collected by the linker. In AArch32 the current EL has been changed from EL3 to EL1 because the the AArch32 PL1&0 translation regime behaves more like the AArch64 EL1&0 translation regime than the EL3 one. Change-Id: I941404299ebe7666ca17619207c923b49a55cb73 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 13 Jul 2018
	cf24229 Browse files » Run compiler on debug macros for type checking ... Even if the log output is too low for a message to be printed out on the console by the debug macros, it should still be evaluated by the compiler to get some type checking and validation of the format specifiers. To do so, introduce the no_tf_log() macro that encloses the call to tf_log() in an always-false condition. This avoids the problem of discovering build issues only when we build the firmware with the right LOG_LEVEL value. Change-Id: Ic0fd252ab691d0187fd925756a4837aca1cbfd7b Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 13 Jul 2018
2018-07-12	Unverified b19269a Browse files » Merge pull request #1432 from Yann-lms/mmc_framework ... [RFC] Add MMC framework Dimitris Papastamos authored on 12 Jul 2018 GitHub committed on 12 Jul 2018
2018-07-12	2a246d2 Browse files » CSS: Use SCMI AP core protocol to set the warm boot entrypoint ... Change-Id: Iaebbeac1a1d6fbd531e5694b95ed068b7a193e62 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com> Dimitris Papastamos committed on 12 Jul 2018
2018-07-11	1931d1d Browse files » ARM platforms: Make arm_lock static ... The ARM_INSTANTIATE_LOCK macro defines a lock meant to be further manipulated using the arm_lock_init/get/release() macros. It has 2 variants, depending on the BL image it is compiled for. One version defines the lock variable with internal linkage whereas the other one, with external linkage. Code that uses these macros is not compliant with MISRA rule 8.4 because when using the external linkage version, there is no visible declaration for the lock variable. This patch defines the arm_lock variable with internal linkage in both cases. This fits well the way these macros are used in the code today, where the lock is not used outside of the translation unit it is defined in. Change-Id: I213a74a2a6088a4f1e9a61a319ca7579c2001320 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 11 Jul 2018
	46e8870 Browse files » Add initial CPU support for Cortex-Helios ... Change-Id: Ic0486131c493632eadf329f80b0b5904aed5e4ef Signed-off-by: Joel Hutton <joel.hutton@arm.com> Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com> Joel Hutton authored on 10 Jan 2018 Dimitris Papastamos committed on 11 Jul 2018
	c84b6cb Browse files » Add initial CPU support for Cortex-Deimos ... Change-Id: I2c4b06423fcd96af9351b88a5e2818059f981f1b Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com> Joel Hutton authored on 4 May 2018 Dimitris Papastamos committed on 11 Jul 2018
	Unverified 6cbf17d Browse files » Merge pull request #1473 from robertovargas-arm/misra ... Misra Dimitris Papastamos authored on 11 Jul 2018 GitHub committed on 11 Jul 2018
	9fdad69 Browse files » Remove integrity check in declare_cpu_ops_base ... This check was added to ensure the correct behaviour of fill_constants macro. This macro has been verified and it is known his correct behaviour. The check generates an error when the clang assembler is used, so it is better to remove the check. Change-Id: I3447ff9e9e5ee5cf0502f65e53c3d105d9396b8b Signed-off-by: Roberto Vargas <roberto.vargas@arm.com> Roberto Vargas committed on 11 Jul 2018
	f21b9f6 Browse files » Remove .struct directive ... This directive is not implemented by clang assembler. The traditional way to implement structs in assembly is using two macros for every field, one for the offset, and another one for the size. For every field, the offset can be calculated using the size and offset of the previous field. Change-Id: Iacc6781e8f302fb925898737b8e85ab4e88a51cc Signed-off-by: Roberto Vargas <roberto.vargas@arm.com> Roberto Vargas committed on 11 Jul 2018
	be7d7f9 Browse files » Remove string concatenation in assembler files ... Clang assembler doesn't support concatenation of adjacent strings. Change-Id: I092a1e30c137d431c6adcc13519fc2d595f92f14 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com> Roberto Vargas committed on 11 Jul 2018
	a9203ed Browse files » Add end_vector_entry assembler macro ... Check_vector_size checks if the size of the vector fits in the size reserved for it. This check creates problems in the Clang assembler. A new macro, end_vector_entry, is added and check_vector_size is deprecated. This new macro fills the current exception vector until the next exception vector. If the size of the current vector is bigger than 32 instructions then it gives an error. Change-Id: Ie8545cf1003a1e31656a1018dd6b4c28a4eaf671 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com> Roberto Vargas committed on 11 Jul 2018