2018-02-28 |
Fix MISRA rule 8.4 in common code
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Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined.
Change-Id: I26e042cb251a6f9590afa1340fdac73e42f23979
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas
committed
on 28 Feb 2018
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2018-02-27 |
FVP: restrict dynamic config to Unix build environment
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This patch restricts building the dynamic config DTBs to the Unix
build environment as the Device Tree compiler may not be available
on other build environments.
Change-Id: Ie690e80010a174300e966240fd977b37561156e0
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 27 Feb 2018
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2018-02-26 |
Dynamic cfg: MISRA fixes
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Change-Id: I1d85b76af002b8b672fcaeca94939b7420bc8243
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 26 Feb 2018
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FVP: Add TB_FW_CONFIG and HW_CONFIG
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This patch adds TB_FW_CONFIG for FVP and allows FVP
to select the appropriate HW_CONFIG to include in the
fip. The HW_CONFIG for FVP is selected via `FVP_HW_CONFIG_DTS`
build option. The TB_FW_CONFIG specifies the load address of
HW_CONFIG to BL2. Since currently the load address is different
between AARCH32 and AARCH64, 2 separate TB_FW_CONFIGs are
maintained for the 2 modes.
Change-Id: Ide8581e752dfa900087f5895c775073c841c0daf
Signed-Off-By: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 26 Feb 2018
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ARM Platforms: Load HW_CONFIG in BL2
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The patch adds the necessary changes to load HW_CONFIG in BL2 for
ARM Platforms :
1. The load address of HW_CONFIG is specified via the `hw_config_addr`
property in TB_FW_CONFIG is loaded by BL1. The `hw_config_max_size`
property defines the maximum size to be expected for the HW_CONFIG.
The `arm_dyn_cfg_helpers.c` and corresponding header implements
utility functions to parse these DT properties defined.
The `arm_dyn_cfg.c` implements wrappers to these helpers to enable
them to be invoked from ARM platform layer.
2. `HW_CONFIG` is added to the `bl2_mem_params_descs[]` array which is
the list of images to be loaded by BL2.
3. The `libfdt` sources are now included when BL2 is built
4. A new helper `populate_next_bl_params_config()` is introduced in
desc_image_load.c to populate the subsequent executable BL images
with the `hw_config` and the corresponding `fw_config` if available.
The `plat_get_next_bl_params()` API for ARM platforms is modified to
invoke this new helper.
5. The implementation of `bl2_early_platform_setup2()` is modified to
consider `arg0` as well in addition to `arg1` passed from BL1.
6. Bump up the BL2 size for Juno to accommodate the inclusion of libfdt.
Change-Id: I80f1554adec41753e0d179a5237364f04fe13a3f
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 26 Feb 2018
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ARM Platorms: Load TB_FW_CONFIG in BL1
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This patch modifies the bl1_platform_setup() API to load and authenticate
TB_FW_CONFIG in BL1. The load address of the same is passed on to BL2 in
`arg0` of entrypoint info. The fvp_io_storage.c and arm_io_storage.c also
adds entries corresponding to TB_FW_CONFIG. A helper function
`arm_load_tb_fw_config()` is added to load and authenticate TB_FW_CONFIG
if present.
Change-Id: Ie7bce667b3fad2b1a083bbcbc0a773f9f04254b1
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 26 Feb 2018
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BL1: Deprecate the `bl1_init_bl2_mem_layout()` API
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The `bl1_init_bl2_mem_layout()` API is now deprecated. The default weak
implementation of `bl1_plat_handle_post_image_load()` calculates the
BL2 memory layout and populates the same in x1(r1). This ensures
compatibility for the deprecated API.
Change-Id: Id44bdc1f572dc42ee6ceef4036b3a46803689315
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 26 Feb 2018
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ARM Platforms: Migrate to new BL handover interface
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This patch migrates the ARM Standard platforms to the new BL
handover interface. The arm_blx_early_platform_setup() functions
are also modified to take in 4 arguments. The `ARM_BL31_PLAT_PARAM_VAL`
value passed to BL31 from BL2 is now in arg3 in preparation of dynamic
configuration arguments.
Change-Id: I33e8e61325a19e7a7127b1ff203c3b86921bf153
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 26 Feb 2018
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Introduce the new BL handover interface
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This patch introduces a new BL handover interface. It essentially allows
passing 4 arguments between the different BL stages. Effort has been made
so as to be compatible with the previous handover interface. The previous
blx_early_platform_setup() platform API is now deprecated and the new
blx_early_platform_setup2() variant is introduced. The weak compatiblity
implementation for the new API is done in the `plat_bl_common.c` file.
Some of the new arguments in the new API will be reserved for generic
code use when dynamic configuration support is implemented. Otherwise
the other registers are available for platform use.
Change-Id: Ifddfe2ea8e32497fe1beb565cac155ad9d50d404
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 26 Feb 2018
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Add image_id to bl1_plat_handle_post/pre_image_load()
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This patch adds an argument to bl1_plat_post/pre_image_load() APIs
to make it more future proof. The default implementation of
these are moved to `plat_bl1_common.c` file.
These APIs are now invoked appropriately in the FWU code path prior
to or post image loading by BL1 and are not restricted
to LOAD_IMAGE_V2.
The patch also reorganizes some common platform files. The previous
`plat_bl2_el3_common.c` and `platform_helpers_default.c` files are
merged into a new `plat_bl_common.c` file.
NOTE: The addition of an argument to the above mentioned platform APIs
is not expected to have a great impact because these APIs were only
recently added and are unlikely to be used.
Change-Id: I0519caaee0f774dd33638ff63a2e597ea178c453
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 26 Feb 2018
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Merge pull request #1273 from antonio-nino-diaz-arm/an/fix-tlbi-disable-mmu
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Ensure the correct execution of TLBI instructions
davidcunado-arm
authored
on 26 Feb 2018
GitHub
committed
on 26 Feb 2018
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2018-02-23 |
Merge pull request #1262 from ssalko/ssalko_dev
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qemu: Fix interrupt type check
davidcunado-arm
authored
on 23 Feb 2018
GitHub
committed
on 23 Feb 2018
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2018-02-22 |
ARM Platforms: Add CASSERT for BL2_BASE
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Change-Id: I93e491fde2a991fc39584c2762f33cbea40541e3
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 22 Feb 2018
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ARM Platforms: Don't build BL1 and BL2 if RESET_TO_SP_MIN=1
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Change-Id: Iadb21bb56f2e61d7e6aec9b3b3efd30059521def
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew
committed
on 22 Feb 2018
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2018-02-21 |
Ensure the correct execution of TLBI instructions
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After executing a TLBI a DSB is needed to ensure completion of the
TLBI.
rk3328: The MMU is allowed to load TLB entries for as long as it is
enabled. Because of this, the correct place to execute a TLBI is right
after disabling the MMU.
Change-Id: I8280f248d10b49a8c354a4ccbdc8f8345ac4c170
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 21 Feb 2018
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2018-02-19 |
Merge pull request #1271 from afaerber/tegra-fixes
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tegra: Fix mmap_region_t struct mismatch
davidcunado-arm
authored
on 19 Feb 2018
GitHub
committed
on 19 Feb 2018
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2018-02-17 |
Merge pull request #1259 from hzhuang1/fix_uart
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hikey960: avoid hardcode on uart port
davidcunado-arm
authored
on 17 Feb 2018
GitHub
committed
on 17 Feb 2018
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tegra: Fix mmap_region_t struct mismatch
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Commit fdb1964 ("xlat: Introduce
MAP_REGION2() macro") added a granularity field to mmap_region_t.
Tegra platforms were using the v2 xlat_tables implementation in
common/tegra_common.mk, but v1 xlat_tables.h headers in soc/*/plat_setup.c
where arrays are being defined. This caused the next physical address to
be read as granularity, causing EINVAL error and triggering an assert.
Consistently use xlat_tables_v2.h header to avoid this.
Fixes ARM-software/tf-issues#548.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Andreas Färber
committed
on 17 Feb 2018
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2018-02-16 |
hikey960: avoid hardcode on uart port
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Avoid hardcode on uart port. The uart port could be auto detected
on HiKey960 platform.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang
committed
on 16 Feb 2018
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2018-02-12 |
ARM platforms: Fix console address for flush
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The console core flush API expects the base address in the first
register, but ARM helpers currently sets the second register with the
base address. This causes an assert failure.
This patch fixes that.
Change-Id: Ic54c423cd60f2756902ab3cfc77b3de2ac45481e
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan
committed
on 12 Feb 2018
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2018-02-09 |
qemu: Fix interrupt type check
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Function plat_ic_get_pending_interrupt_type() should return interrupt
type, not id. The function is used in aarch64 exception handling and
currently the irq/fiq forwarding fails if a secure interrupt happens while
running normal world.
The qemu-specific gic file does not contain any extra functionality so it
can be removed and common file can be used instead.
fixes arm-software/tf-issues#546
Signed-off-by: Santeri Salko <santeri.salko@gmail.com>
Santeri Salko
committed
on 9 Feb 2018
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2018-02-07 |
hikey*, poplar: platform.mk: Fix typo in variable assignments
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Victor Chong
committed
on 7 Feb 2018
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poplar: Support Trusted OS extra image (OP-TEE header) parsing
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Victor Chong
committed
on 7 Feb 2018
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poplar: Add LOAD_IMAGE_V2 support
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Victor Chong
committed
on 7 Feb 2018
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poplar: Add build option for dram size
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Victor Chong
committed
on 7 Feb 2018
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poplar: Fix typo
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Victor Chong
committed
on 7 Feb 2018
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poplar: Remove unused function prototype
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Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Victor Chong
committed
on 7 Feb 2018
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2018-02-06 |
Merge pull request #1173 from etienne-lms/armv7-qemu
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support to boot OP-TEE on AArch32/Armv7+example with Cortex-A15/Qemu
davidcunado-arm
authored
on 6 Feb 2018
GitHub
committed
on 6 Feb 2018
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Merge pull request #1224 from masahir0y/gzip
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Support GZIP-compressed images for faster loading and verification
davidcunado-arm
authored
on 6 Feb 2018
GitHub
committed
on 6 Feb 2018
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2018-02-05 |
qemu: support ARMv7/Cortex-A15
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Define Qemu AArch32 implementation for some platform functions
(core position, secondary boot cores, crash console). These are
derived from the AArch64 implementation.
BL31 on Qemu is needed only for ARMv8 and later. On ARMv7, BL32 is
the first executable image after BL2.
Support SP_MIN and OP-TEE as BL32: create a sp_min make script target
in Qemu, define mapping for IMAGE_BL32
Minor fix Qemu return value type for plat_get_ns_image_entrypoint().
Qemu model for the Cortex-A15 does not support the virtualization
extension although the core expects it. To overcome the issue, Qemu
ARMv7 configuration set ARCH_SUPPORTS_VIRTUALIZATION to 0.
Add missing AArch32 assembly macro arm_print_gic_regs from ARM platform
used by the Qemu platform.
Qemu Cortex-A15 model integrates a single cluster with up to 4 cores.
Change-Id: I65b44399071d6f5aa40d5183be11422b9ee9ca15
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Etienne Carriere
committed
on 5 Feb 2018
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