LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

History for arm-trusted-firmware / plat

2019-01-28	Unverified d4dcadb Browse files » Merge pull request #1773 from grandpaul/rpi3-gpio-driver ... Rpi3 gpio driver Antonio Niño Díaz authored on 28 Jan 2019 GitHub committed on 28 Jan 2019
2019-01-25	2be86dd Browse files » rpi3: Enable GPIO in BL2 ... This patch inits the GPIO in BL2 earlysetup. So BL2 can start operating GPIO pins. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org> Ying-Chun Liu (PaulLiu) committed on 25 Jan 2019
	560293b Browse files » fvp: pwrc: Move to drivers/ folder ... Change-Id: I670ea80e0331c2d4b2ccfa563a45469a43f6902d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 25 Jan 2019
	5932d19 Browse files » plat/arm: sds: Move to drivers/ folder ... Change-Id: Ia601d5ad65ab199e747fb60af4979b7db477d249 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 25 Jan 2019
	2d4135e Browse files » plat/arm: scp: Move to drivers/ folder ... Change-Id: Ida5dae39478654405d0ee31a6cbddb4579e76a7f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 25 Jan 2019
	0387aa4 Browse files » plat/arm: scpi: Move to drivers/ folder ... Change-Id: Icc59cdaf2b56f6936e9847f1894594c671db2e94 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 25 Jan 2019
	c411396 Browse files » plat/arm: mhu: Move to drivers/ folder ... Change-Id: I656753a1825ea7340a3708b950fa6b57455e9056 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 25 Jan 2019
	14928b8 Browse files » plat/arm: scmi: Move to drivers/ folder ... Change-Id: I8989d2aa0258bf3b50a856c5b81532d578600124 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 25 Jan 2019
	3661d8e Browse files » plat/arm: Move dynamic xlat enable logic to makefile ... The PLAT_XLAT_TABLES_DYNAMIC build option, defined in platform_def.h in Arm platforms, is checked by several headers, affecting their behaviour. To avoid issues around the include ordering of the headers, the definition should be moved to the platform's makefile. Change-Id: I0e12365c8d66309122e8a20790e1641a4f480a10 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 25 Jan 2019
	bd9344f Browse files » plat/arm: Sanitise includes ... Use full include paths like it is done for common includes. This cleanup was started in commit d40e0e08283a ("Sanitise includes across codebase"), but it only cleaned common files and drivers. This patch does the same to Arm platforms. Change-Id: If982e6450bbe84dceb56d464e282bcf5d6d9ab9b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 25 Jan 2019
	Unverified 7ca572d Browse files » Merge pull request #1761 from satheesbalya-arm/sb1/sb1_2661_bl31_overlay ... plat/arm: Save BL2 descriptors to reserved memory. Antonio Niño Díaz authored on 25 Jan 2019 GitHub committed on 25 Jan 2019
	Unverified 72106f8 Browse files » Merge pull request #1766 from Anson-Huang/master ... Add more SIP runtime service for i.MX8 Antonio Niño Díaz authored on 25 Jan 2019 GitHub committed on 25 Jan 2019
	Unverified 6eee586 Browse files » Merge pull request #1777 from glneo/runtime-gicr ... ti: k3: common: Add support for runtime detection of GICR base address Antonio Niño Díaz authored on 25 Jan 2019 GitHub committed on 25 Jan 2019
	Unverified 2501a03 Browse files » Merge pull request #1779 from Anson-Huang/a53_errata ... Enable necessary A53 erratas for i.MX8QM and i.MX8MQ Antonio Niño Díaz authored on 25 Jan 2019 GitHub committed on 25 Jan 2019
2019-01-23	cce9040 Browse files » imx: enable necessary errata for i.mx8qm ... NXP's i.MX8QM uses Cortex-A53 r0p4, enable necessary erratas for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Anson Huang committed on 23 Jan 2019
	218bdbe Browse files » imx: enable necessary errata for i.mx8mq ... NXP's i.MX8MQ uses Cortex-A53 r0p4, enable necessary erratas for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Anson Huang committed on 23 Jan 2019
	8ec4562 Browse files » Tegra186: remove RELOCATE_TO_BL31_BASE config ... This patch removes this unused config option from the Tegra186 platform makefiles. Change-Id: Idcdf6854332a26599323a247289c2d3ce19f475f Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	fc5adf7 Browse files » Tegra: memctrl_v2: remove usage of ENABLE_SMMU_DEVICE config ... This patch removes the usage of this platform config, as it is always enabled by all the supported platforms. Change-Id: Ie7adb641adeb3604b177b6960b797722d60addfa Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	3e1923d Browse files » Tegra: add 'late' platform setup handler ... This patch adds a platform setup handler that gets called after the MMU is enabled. Platforms wanting to make use of this handler should declare 'plat_late_platform_setup' handler in their platform files, to override the default weakly defined handler. Change-Id: Ibc97a2e5a24608ddea856d0bd543a9d5876f604c Signed-off-by: Dilan Lee <dilee@nvidia.com> Dilan Lee authored on 26 Oct 2017 Varun Wadekar committed on 23 Jan 2019
	dd20f5b Browse files » Tegra: spe: shared console for Tegra platforms ... There are Tegra platforms which have limited UART ports and so all the components have to share the console. The SPE helps out by collecting all the logs in such cases and prints them on the shared UART port. This patch adds a driver to communicate with the SPE driver, which in turn provides the console. Change-Id: Ie750520b936b8bed0ab1d876f03fc0a3490a85a3 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	4cba698 Browse files » Tegra: console driver compilation from platform makefiles ... This patch includes the console driver from individual platform makefiles and removes it from tegra_common.mk. This allows future platforms to include consoles of their choice. Change-Id: I7506562bfac78421a80fb6782ac8472fbef6cfb0 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	2ad1bdd Browse files » Tegra: smmu: change exit criteria for context size calculation ... Tegra SoCs currently do not have a SMMU register at address 0xFFFFFFFF. This patch changes the search criteria, to look for this marker, to calculate the size of the saved context. Change-Id: I15d91945ecb78267f91c45f37985dbb2327ca3ae Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	c63ec26 Browse files » Tegra: memctrl_v2: platform handler for TZDRAM setup ... The Tegra memctrl driver sets up the TZDRAM fence during boot and system suspend exit. This patch provides individual platforms with handlers to perform custom steps during TZDRAM setup. Change-Id: Iee094d6ca189c6dd24f1147003c33c99ff3a953b Signed-off-by: Steven Kao <skao@nvidia.com> Steven Kao authored on 14 Nov 2017 Varun Wadekar committed on 23 Jan 2019
	539c62d Browse files » Tegra186: save system suspend entry marker to TZDRAM ... This patch adds support to save the system suspend entry and exit markers to TZDRAM to help the trampoline code decide if the current warmboot is actually an exit from System Suspend. The Tegra186 platform handler sets the system suspend entry marker before entering SC7 state and the trampoline flips the state back to system resume, on exiting SC7. Change-Id: I29d73f1693c89ebc8d19d7abb1df1e460eb5558e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	889c07c Browse files » Tegra186: helper functions for CPU rst handler and SMMU ctx offset ... This patch adds a helper function to get the SMMU context's offset and uses another helper function to get the CPU trampoline offset. These helper functions are used by the System Suspend entry sequence to save the SMMU context and CPU reset handler to TZDRAM. Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	d7be5e2 Browse files » Tegra: bpmp: return error if BPMP init fails ... This patch returns error if BPMP initialization fails. The platform code marks the cluster as "runnning" since we wont be able to get it into the low power state without BPMP. Change-Id: I86f51d478626240bb7b4ccede8907674290c5dc1 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	601a8e5 Browse files » Tegra: rename secure scratch register macros ... This patch renames all the secure scratch registers to reflect their usage. This is a list of all the macros being renamed: - SECURE_SCRATCH_RSV1_* -> SCRATCH_RESET_VECTOR_* - SECURE_SCRATCH_RSV6 -> SCRATCH_SECURE_BOOTP_FCFG - SECURE_SCRATCH_RSV11_* -> SCRATCH_SMMU_TABLE_ADDR_* - SECURE_SCRATCH_RSV53_* -> SCRATCH_BOOT_PARAMS_ADDR_* - SECURE_SCRATCH_RSV55_* -> SCRATCH_TZDRAM_ADDR_* NOTE: Future SoCs will have to define these macros to keep the drivers functioning. Change-Id: Ib3ba40dd32e77b92b47825f19c420e6fdfa8b987 Signed-off-by: Steven Kao <skao@nvidia.com> Steven Kao authored on 23 Oct 2017 Varun Wadekar committed on 23 Jan 2019
	d5bd0de Browse files » Tegra: memctrl_v2: platform handler for TZDRAM settings ... The Tegra memctrl driver sets up the TZDRAM fence during boot and system suspend exit. This patch provides individual platforms with handlers to perform platform specific steps, e.g. enable encryption, save base/size to secure scratch registers. Change-Id: Ifaa2e0eac20b50f77ec734256544c36dd511bd63 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	7191566 Browse files » Tegra186: secondary: fix MISRA violations for Rules 8.6, 11.1 ... This patch fixes the following MISRA violations: Rule 8.6: Externally-linked object or function has "no" definition(s). Rule 11.1: A cast shall not convert a pointer to a function to any other type. Change-Id: Ic1f6fc14c744e54ff782c6987dab9c9430410f5e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019
	b6d1757 Browse files » Tegra186: sanity check target cluster during core power on ... This patch sanity checks the target cluster value, during core power on, by comparing it against the maximum number of clusters supported by the platform. Reported by: Rohit Khanna <rokhanna@nvidia.com> Change-Id: Ia73ccf04bd246403de4ffff6e5c99e3b00fb98ca Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 23 Jan 2019