| 2019-09-05 |
amlogic: Fix prefixes in the efuse driver
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The efuse driver is hardcoding the GXBB prefix. No need to do that since
the driver is shared between multiple SoCs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I97691b0bbd55170d8216d301a3fc04feb8c2af2e
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the platform macros file
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Fixing at the same time the related register names.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ib1130d50abe6088f1c0826878d1ae454a0f23008
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Fix prefixes in the helpers file
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The code is the common directory is now generic, no need to have the SoC
prefix hardcoded in the function names.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ied3a5e506b9abd4c2d6f893bafef50019bff24f1
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Rework Makefiles
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Now that every piece is in place, the makefiles can be refactored and
slightly beautified removing useless and redundant parts.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: If74e1909df52d475cf4b0dfed819d07d3a4c85b9
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move the SIP SVC code to common directory
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The code is the same between GXBB and GXL. Move it to the common source
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I875689a6fd029971aa755fc2725217e90ed06b6c
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move topology file to common directory
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As done already for multiple files, move the topology file to the common
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Iaca357a089593ad58c35c05c929239132249dcda
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move thermal code to common directory
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As for most of the Amlogic code, this is common between the Amlogic
SoCs. Move the code to the common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Id3f0073ff1f0b9ddbe964f80303323ee4a2f27b0
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move MHU code to common directory
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The MHU code is shared between all the supported platforms. Move it to
the common directory instead.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Iaf53122866eae85c13f772927d16836dcfa877a3
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move efuse code to common directory
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The efuse code is the same between GXL and GXBB. Move the code to common
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ie37f21d1907a36292724f1fb645a78041fe4a6b3
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move platform macros assembly file to common directory
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The platform macros are shared between all the SoCs. Move it to common
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ia04c3ffe4d7b068aa701268ed99f69995d8db92b
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Introduce unified private header file
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Now that also the SHA256 DMA driver is shared between all the SoCs, we
can have one single private platform header file.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I77d51915f9d8233aeceeed66ed1f491573402cfc
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move SCPI code to common directory
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The SCPI code is the same between GXBB and GXL. No need to have it
replicated for each SoCs. Move it to the common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I7e416caf1e9538b3ce7702c0363ee00a054e2451
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move the SHA256 DMA driver to common directory
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The SHA256 DMA driver can be used by multiple SoCs. Move it to the
common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I96319eeeeeebd503ef0dcb07c0e4ff6a67afeaa5
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Move assembly helpers to common directory
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The assembly helpers are common to all the amlogic SoCs. Move the .S
file to the common directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I0d8616a7ae22dbcb14848cefd0149b6bb5814ea6
Carlo Caione
committed
on 5 Sep 2019
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amlogic: Introduce directory parameters in the makefiles
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Make the platform name a parameter for the source directories. Besides a
cosmetic fix, this is going to be helpful when reusing the same Makefile
for different SoCs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I307897a21800cca8ad68a5ab8972d27e9356ff2a
Carlo Caione
committed
on 5 Sep 2019
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meson: Rename platform directory to amlogic
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Meson is the internal code name for the SoC family. The correct name for
the platform should be Amlogic. Change the name of the platform
directory.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
Carlo Caione
committed
on 5 Sep 2019
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Merge "intel: stratix10: Fix reliance on hard coded clock information" into integration
Sandrine Bailleux
authored
on 5 Sep 2019
TrustedFirmware Code Review
committed
on 5 Sep 2019
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| 2019-09-04 |
doc: Updated user guide with new Mbed TLS version number
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Signed-off-by: zelalem-aweke <zelalem.aweke@arm.com>
Change-Id: Ib12ecc0b283274c74cdfa57caf9e1a105dce3afe
zelalem-aweke
committed
on 4 Sep 2019
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mbedtls: use #include <...> instead of "..."
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The #include "mbedtls/check_config.h" directive first searches for
the header in the relative path to mbedtls_config.h, i.e.
include/drivers/auth/mbedtls/mbedtls/check_config.h
Obviously, it does not exist since check_config.h is located in
the mbedtls project.
It is more sensible to use #include <...> form.
Change-Id: If72a71381f84e7748a2c9f07dd1176559d9bb1d2
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
committed
on 4 Sep 2019
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| 2019-09-03 |
Merge "uniphier: set CONSOLE_FLAG_TRANSLATE_CRLF and clean up console driver" into integration
Alexei Fedorov
authored
on 3 Sep 2019
TrustedFirmware Code Review
committed
on 3 Sep 2019
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uniphier: set CONSOLE_FLAG_TRANSLATE_CRLF and clean up console driver
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This console driver sends '\r' before 'n', not after.
It works, but the convention is "\r\n" (i.e. CRLF)
Instead of fixing it in the driver, set CONSOLE_FLAG_TRANSLATE_CRLF
to leave it to the framework.
Change-Id: I2154e29313739a40dff70cfb5c0f8989136d4ad2
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada
authored
on 22 Jul 2019
Paul Beesley
committed
on 3 Sep 2019
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| 2019-09-02 |
mmc: stm32_sdmmc2: correctly manage block size
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DBLOCKSIZE should be filled such as the data size is 2^DBLOCKSIZE.
Hence it is calculated with __builtin_ctz.
Change-Id: Id6b5ff9b594afc4fc523a388011beed307e6abd1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 2 Sep 2019
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mmc: stm32_sdmmc2: manage max-frequency property from DT
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If the max-frequency property is provided in the device tree mmc node,
it should be managed. The max allowed frequency will be the min between
this property value and what the card can support.
Change-Id: I885b676c3300d2670a0fe4c6ecab87758b5893ad
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 2 Sep 2019
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stm32mp1: move check_header() to common code
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This function can be used on several stm32mp devices, it is then moved in
plat/st/common/stm32mp_common.c.
Change-Id: I862debe39604410f71a9ddc28713026362e9ecda
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 2 Sep 2019
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stm32mp1: keep console during runtime
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The runtime console is only kept in DEBUG configuration.
Change-Id: I0447dfcacb9a63a12bcdab7c55584d70c3220e5b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 2 Sep 2019
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stm32mp1: sp_min: initialize MMU and cache earlier
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This change enhances performance and security in BL32 stage.
Change-Id: I64df5995fc6b04f6cf42d6a00a6d3d0f602b5407
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 2 Sep 2019
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stm32mp1: add support for LpDDR3
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This change enables LpDDR3 initialization with PMIC.
Change-Id: I2409a808335dfacd69a8517cb8510cee98bb8161
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 2 Sep 2019
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stm32mp1: use a common function to check spinlock is available
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To use spinlocks, MMU should be enabled, as well as data cache.
A common function is created (moved from clock file).
It is then used whenever a spinlock has to be taken, in BSEC and clock
drivers.
Change-Id: I94baed0114a2061ad71bd5287a91bf7f1c6821f6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier
committed
on 2 Sep 2019
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clk: stm32mp: enable RTCAPB clock for dual-core chips
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In order to correctly manage the bring-up of non boot CPUs, the RTCAPB
clock needs to be enabled.
It controls the access to backup registers, where the CPU entrypoint
will be stored.
Change-Id: Ifeeceb4faf64bc9e0778030444f437cc0bb27272
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Yann Gautier
committed
on 2 Sep 2019
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stm32mp1: check if the SoC is single core
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Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip.
A function is added to check the part number of the SoC.
If it corresponds to STM32MP151A or STM32MP151C, then the chip has a single
Cortex-A7.
Change-Id: Icac2015c5d03ce0bcb8e99bbaf1ec8ada34be49c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Yann Gautier
committed
on 2 Sep 2019
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