Unique names for defines in the CPU libraries ...

This patch makes all the defines in the CPU libraries unique,
by prefixing them with the CPU name.

NOTE: PLATFORMS USING THESE MACROS WILL HAVE TO UPDATE THEIR CODE
TO START USING THE UPDATED NAMES

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: enable 'signed-comparison' compilation warning/errors ...

This patch enables the 'sign-compare' flag, to enable warning/errors
for comparisons between signed/unsigned variables. The warning has
been enabled for all the Tegra platforms, to start with.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Merge pull request #979 from soby-mathew/sm/aarch32_macro_fix ...

Fix stdlib defines for AArch32

Merge pull request #974 from masahir0y/uniphier ...

UniPhier Initial Support

Merge pull request #982 from hzhuang1/fix_hikey960 ...

Fix hikey960

hikey960: fix the calculation in boardid ...

Since the type of ADC value is always unsigned int, don't
need to check the value with negative value.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

ufs: fix the and operator ...

Should use AND (&), not &&.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

uniphier: add TSP support ...

Add TSP to test BL32 without relying on external projects.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

uniphier: support Socionext UniPhier platform ...

Initial commit for Socionext UniPhier SoC support.  BL1, Bl2, and
BL31 are supported.  Refer to docs/plat/socionext-uniphier.md for
more detais.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Fix stdlib defines for AArch32 ...

Some of the macro defines in the header files of `include/lib/stdlib/machine/`
folder are not correct for AArch32. This patch fixes the same.

Change-Id: I8bfaf638a7986fd902648d2074537bd26c313cb3
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

Merge pull request #972 from achingupta/ag/freebsd-dt-change ...

Device tree changes to boot FreeBSD on FVPs

Merge pull request #971 from Xilinx/tegra ...

tegra: Fix build errors

Merge pull request #973 from danh-arm/dh/add-maintainers ...

Docs: Clarify copyright requirements

Merge pull request #968 from antonio-nino-diaz-arm/an/snprintf-alt ...

mbedtls: Don't use tf_snprintf if option not defined

Merge pull request #967 from rockchip-linux/rockchip-cleanup-20170606 ...

RK3399: Shrink M0 SRAM code to fit in PMUSRAM

tegra: Fix build errors ...

The 'impl' variable is guarded by the symbol DEBUG, but used in an INFO
level print statement. INFO is defined based on LOG_LEVEL. Hence, builds
would fail when
 - DEBUG=0 && LOG_LEVEL>=LOG_LEVEL_INFO with a variable used but not defined
 - DEBUG=1 && LOG_LEVEL<LOG_LEVEL_INFO with a variable defined but not used

Fixing this by guarding impl with the same condition that guards INFO.

Fixes ARM-software/tf-issues#490
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

Docs: Clarify copyright requirements ...

Clarify copyright requirements in contributing.md.

Also clarify maintainership structure by adding a new maintainers.md. This
imports individual maintainer details from the GitHub wiki.

Fixes ARM-software/tf-issues#488

Change-Id: I7135d3f77ea45533f667de7e1dcdf65697486a91
Signed-off-by: Dan Handley <dan.handley@arm.com>

Merge pull request #970 from vingu-linaro/enable-pmf-rt-instr-hikey ...

Enable pmf rt instr hikey

Merge pull request #959 from hzhuang1/hikey960_v1 ...

Hikey960 v1

rockchip: check wakeup cpu when resume ...

unlike rk3399 and rk3368, there are some rockchip 64bit SOC
do not have CPUPD, and pmu_cpuson_entrypoint() is common
function for rockchip platform, so we need to check wakeup
cpu when resume.

Change-Id: I6313e8a9d7c16b03e033414f0cb281646c2159ff
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: enable PMU_PERILP_PD_EN bit when suspend ...

with PMU_PERILP_PD_EN bit enable, the soc will shutdown
cm0, crypto, dcf, imem(normal SRAM), dmac, bootrom, efuse_con,
spi, i2c, uart, saradc, tsadc when suspend, we have M0 code
need to run when suspend in normal SRAM, so we need to take
care of that.

Change-Id: I8c066637e5b81d4b1d53197450b9d592cbe00793
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

rockchip/rk3399: Move DRAM restore to PMUSRAM ...

This moves the DRAM restore code to PMUSRAM. This is so that the
voltage domain that contains the SRAM that it was stored in before may
be turned off during system suspend.

Change-Id: Id761181a30caadd12f1ce061d1034f3159a76d28
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: convert to for-loops to save code space ...

This converts two functions to use for-loops. This saves a bit of
space to help moving DRAM resume code to PMUSRAM.

Change-Id: Ie6ca490cf50c2ec83335cf1845b337c3e8a47496
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Remove unneeded if statement ...

The removed if statement would make the same check that the for loop
it is in does to break out of the for loop, so it doesn't make any
sense to keep it there.

Change-Id: I819c29f9182e6de1fc47e418aed15ad38e8f9fa9
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Remove unneeded register sets ...

This removes the mmio_... function calls to set the multicast bit for
the PHY registers when overriding the write leveling values. These are
not needed since multicast is set by default when calling the
function, and it's also better not to leave the side effect of
disabling multicast when exiting the function.

Change-Id: I83e089a2a2d55268b3832f36724c3b2c4be81082
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: remove unneeded DDR restore function ...

This removes the phy_dll_bypass_set function as it is unneeded. The
values that function sets are saved during suspend, so the proper
values will be restored on resume.

Change-Id: I17542206c56e639ce8cb6375233145167441d4e2
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

rockchip/rk3399: Save space for DRAM suspend data ...

This removes the space allocation for the unused PHY register space.
For instance in PHY registers 0-127, only 0-90 are used, so don't save
the 91-127 registers. This saves about 1.6KB of space.

Change-Id: I0c9f6d9bed8f0c1f3b8b805dfb10cf0c06208919
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

rockchip: add pmusram section ...

the function pmu_cpuon_entrypoint() need to run in the pmusram,
we just copy bin file to pmusram before, now we add pmusram section
and link pmu_cpuon_entrypoint() to pmusram directly

Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

rockchip/rk3399: fix DRAM gate training issue ...

The differential signal of DQS need keep low level
before gate training. It need enable RPULL and disable
PHY side ODT to ensure it when do gate training.
But it can not access the PHY registers to do it when
perform DFS.So the workaroud as below: It is ensure that
the PHY's read gate is landing somewhere in the incoming
DQS's pulses before it starts searching for pre-amble window.
It need get the rddqs_delay_ps to calculate the start point
of gate training for DFS.

Change-Id: I79eabcf4ec9a9c8f4539f68a51f22afba49c72fe
Signed-off-by: Lin Huang <hl@rock-chips.com>

hikey960: add document ...

Add document on HiKey960 platform and how to build.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>