LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

2017-10-05	fdb1964 Browse files » xlat: Introduce MAP_REGION2() macro ... The current implementation of the memory mapping API favours mapping memory regions using the biggest possible block size in order to reduce the number of translation tables needed. In some cases, this behaviour might not be desirable. When translation tables are edited at run-time, coarse-grain mappings like that might need splitting into finer-grain tables. This operation has a performance cost. The MAP_REGION2() macro allows to specify the granularity of translation tables used for the initial mapping of a memory region. This might increase performance for memory regions that are likely to be edited in the future, at the expense of a potentially increased memory footprint. The Translation Tables Library Design Guide has been updated to explain the use case for this macro. Also added a few intermediate titles to make the guide easier to digest. Change-Id: I04de9302e0ee3d326b8877043a9f638766b81b7b Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Sandrine Bailleux authored on 28 Sep 2017 Antonio Nino Diaz committed on 5 Oct 2017
2017-10-04	cb2cfae Browse files » Merge pull request #1115 from jeenu-arm/tsp-mt ... TSP: Support multi-threading CPUs on FVP davidcunado-arm authored on 4 Oct 2017 GitHub committed on 4 Oct 2017
2017-10-04	5e4ca66 Browse files » TSP: Support multi-threading CPUs on FVP ... Commit `11ad8f2` added supporting multi-threaded CPUs on FVP platform, including modifications for calculating CPU IDs. This patch imports the strong definition of the same CPU ID calculation on FVP platform for TSP. Without this patch, TSP on FVP was using the default CPU ID calculation, which would end up being wrong on CPUs with multi-threading. Change-Id: If67fd492dfce1f57224c9e693988c4b0f89a9a9a Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 4 Oct 2017
2017-10-02	b8fa2ed Browse files » Merge pull request #1107 from geesun/qx/add_ecdsa_support ... Add support for TBBR using ECDSA keys in ARM platforms davidcunado-arm authored on 2 Oct 2017 GitHub committed on 2 Oct 2017
2017-10-02	6eb4d72 Browse files » Merge pull request #1114 from vchong/updt_docs ... hikey*: Update docs davidcunado-arm authored on 2 Oct 2017 GitHub committed on 2 Oct 2017
2017-09-29	37c2165 Browse files » hikey*: Update docs ... Signed-off-by: Victor Chong <victor.chong@linaro.org> Victor Chong committed on 29 Sep 2017
2017-09-27	3b6ceef Browse files » Merge pull request #1111 from douglas-raillard-arm/dr/fix_uniphier_xlat_include ... Uniphier: fix xlat tables lib inclusion davidcunado-arm authored on 27 Sep 2017 GitHub committed on 27 Sep 2017
2017-09-27	142a17f Browse files » Uniphier: fix xlat tables lib inclusion ... Uses the xlat tables library's Makefile instead of directly including the source files in the Uniphier platform port. Change-Id: I27294dd71bbf9bf3e82973c75324652b037e5bce Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 27 Sep 2017
2017-09-26	2152505 Browse files » Merge pull request #1110 from masahir0y/xlat ... Fix MAP_REGION for GCC 4.9 davidcunado-arm authored on 26 Sep 2017 GitHub committed on 26 Sep 2017
2017-09-26	03f55a5 Browse files » xlat: remove cast in MAP_REGION to get back building with GCC 4.9 ... Since commit 769d65da778b ("xlat: Use MAP_REGION macro as compatibility layer"), building with GCC 4.9 fails. CC plat/arm/board/fvp/fvp_common.c plat/arm/board/fvp/fvp_common.c:60:2: error: initializer element is not constant ARM_MAP_SHARED_RAM, ^ plat/arm/board/fvp/fvp_common.c:60:2: error: (near initialization for 'plat_arm_mmap[0]') make: *** [Makefile:535: build/fvp/release/bl1/fvp_common.o] Error 1 Taking into account that MAP_REGION(_FLAT) is widely used in array initializers, do not use cast. Fixes: 769d65da778b ("xlat: Use MAP_REGION macro as compatibility layer") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 26 Sep 2017
2017-09-25	92d0926 Browse files » Merge pull request #1108 from sandrine-bailleux-arm/sb/fvp-utils-def ... FVP: Include utils_def.h instead of utils.h davidcunado-arm authored on 25 Sep 2017 GitHub committed on 25 Sep 2017
	c2280b3 Browse files » Merge pull request #1105 from antonio-nino-diaz-arm/an/epd1-bit ... Set TCR_EL1.EPD1 bit to 1 davidcunado-arm authored on 25 Sep 2017 GitHub committed on 25 Sep 2017
	36f5284 Browse files » Merge pull request #1106 from antonio-nino-diaz-arm/an/bit-macro ... Fix type of `unsigned long` constants davidcunado-arm authored on 25 Sep 2017 GitHub committed on 25 Sep 2017
2017-09-22	dcbf393 Browse files » Dynamic selection of ECDSA or RSA ... Add new option rsa+ecdsa for TF_MBEDTLS_KEY_ALG, which selects rsa or ecdsa depending on the certificate used. Change-Id: I08d9e99bdbba361ed2ec5624248dc382c750ad47 Signed-off-by: Qixiang Xu <qixiang.xu@arm.com> Qixiang Xu committed on 22 Sep 2017
2017-09-21	9db9c65 Browse files » Add support for TBBR using ECDSA keys in ARM platforms ... - fixed compile error when KEY_ALG=ecdsa - add new option ecdsa for TF_MBEDTLS_KEY_ALG - add new option devel_ecdsa for ARM_ROTPK_LOCATION - add ecdsa key at plat/arm/board/common/rotpk/ - reduce the mbedtls heap memory size to 13k Change-Id: I3f7a6170af93fdbaaa7bf2fffb4680a9f6113c13 Signed-off-by: Qixiang Xu <qixiang.xu@arm.com> Qixiang Xu committed on 21 Sep 2017
	ddfd38e Browse files » plat/arm : update BL size macros to give BL1 and BL2 more space for TBB ... For Trusted Board Boot, BL1 RW section and BL2 need more space to support the ECDSA algorithm. Specifically, PLAT_ARM_MAX_BL1_RW_SIZE is increased on ARM platforms. And on the Juno platform: - BL2 size, PLAT_ARM_MAX_BL2_SIZE is increased. - SCP_BL2 is loaded into the space defined by BL31_BASE -> BL31_RW_BASE. In order to maintain the same size space for SCP_BL2,PLAT_ARM_MAX_BL31_SIZE is increased. Change-Id: I379083f918b40ab1c765da4e71780d89f0058040 Co-Authored-By: David Cunado <david.cunado@arm.com> Signed-off-by: Qixiang Xu <qixiang.xu@arm.com> Qixiang Xu committed on 21 Sep 2017
	d08f8c6 Browse files » FVP: Include utils_def.h instead of utils.h ... platform_def.h doesn't need all the definitions in utils.h, the ones in utils_def.h are enough. This patch is related to the changes introduced by commit 53d9c9c85b. Change-Id: I4b2ff237a2d7fe07a7230e0e49b44b3fc2ca8abe Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 21 Sep 2017
	e47ac1f Browse files » Fix type of `unsigned long` constants ... The type `unsigned long` is 32 bit wide in AArch32, but 64 bit wide in AArch64. This is inconsistent and that's why we avoid using it as per the Coding Guidelines. This patch changes all `UL` occurrences to `U` or `ULL` depending on the context so that the size of the constant is clear. This problem affected the macro `BIT(nr)`. As long as this macro is used to fill fields of registers, that's not a problem, since all registers are 32 bit wide in AArch32 and 64 bit wide in AArch64. However, if the macro is used to fill the fields of a 64-bit integer, it won't be able to set the upper 32 bits in AArch32. By changing the type of this macro to `unsigned long long` the behaviour is always the same regardless of the architecture, as this type is 64-bit wide in both cases. Some Tegra platform files have been modified by this patch. Change-Id: I918264c03e7d691a931f0d1018df25a2796cc221 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 21 Sep 2017
	3388b38 Browse files » Set TCR_EL1.EPD1 bit to 1 ... In the S-EL1&0 translation regime we aren't using the higher VA range, whose translation table base address is held in TTBR1_EL1. The bit TCR_EL1.EPD1 can be used to disable translations using TTBR1_EL1, but the code wasn't setting it to 1. Additionally, other fields in TCR1_EL1 associated with the higher VA range (TBI1, TG1, SH1, ORGN1, IRGN1 and A1) weren't set correctly as they were left as 0. In particular, 0 is a reserved value for TG1. Also, TBBR1_EL1 was not explicitly set and its reset value is UNKNOWN. Therefore memory accesses to the higher VA range would result in unpredictable behaviour as a translation table walk would be attempted using an UNKNOWN value in TTBR1_EL1. On the FVP and Juno platforms accessing the higher VA range resulted in a translation fault, but this may not always be the case on all platforms. This patch sets the bit TCR_EL1.EPD1 to 1 so that any kind of unpredictable behaviour is prevented. This bug only affects the AArch64 version of the code, the AArch32 version sets this bit to 1 as expected. Change-Id: I481c000deda5bc33a475631301767b9e0474a303 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 21 Sep 2017
	df312c5 Browse files » xlat: simplify mmap_add_region_check parameters (#1101) ... Use a mmap_region_t as parameter instead of getting a parameter for each structure member. This reduces the scope of changes when adding members to mmap_region_t. Also align on the convention of using mm_cursor as a variable name for the currently inspected region when iterating on the region array. Change-Id: If40bc4351b56c64b214e60dda27276d11ce9dbb3 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard authored on 21 Sep 2017 davidcunado-arm committed on 21 Sep 2017
2017-09-19	ea12986 Browse files » Merge pull request #1099 from douglas-raillard-arm/dr/fix_mm_copy ... xlat: fix mm copy when adding a region davidcunado-arm authored on 19 Sep 2017 GitHub committed on 19 Sep 2017
2017-09-19	569c537 Browse files » Merge pull request #1102 from Xilinx/fpga_load ... zynqmp: Sync function declaration and definition davidcunado-arm authored on 19 Sep 2017 GitHub committed on 19 Sep 2017
2017-09-18	b3ac699 Browse files » zynqmp: Sync function declaration and definition ... Synchronize argument order between function definition and declaration of pm_fpga_load. Fixes ARM-software/tf-issues#514 Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Soren Brinkmann committed on 18 Sep 2017
2017-09-18	b4f4a2f Browse files » Merge pull request #1093 from soby-mathew/eb/log_fw ... Implement log framework davidcunado-arm authored on 18 Sep 2017 GitHub committed on 18 Sep 2017
2017-09-15	756f9bb Browse files » Merge pull request #1094 from douglas-raillard-arm/dr/fix_mmap_add_dynamic_region ... xlat: Use MAP_REGION macro as compatibility layer davidcunado-arm authored on 15 Sep 2017 GitHub committed on 15 Sep 2017
	1cde9b9 Browse files » Merge pull request #1089 from Leo-Yan/hikey_enable_debug_module ... Hikey: enable CPU debug module davidcunado-arm authored on 15 Sep 2017 GitHub committed on 15 Sep 2017
	508a0f2 Browse files » Merge pull request #1096 from davidcunado-arm/im/mair_attributes_helper ... Helper macro to create MAIR encodings davidcunado-arm authored on 15 Sep 2017 GitHub committed on 15 Sep 2017
2017-09-14	73addb7 Browse files » xlat: fix mm copy when adding a region ... mmap_add_region_ctx and mmap_add_dynamic_region_ctx are clearing members that they are not aware of by copying each member one by one. Replace this by structure assignment. Change-Id: I7c70cb408c8a8eb551402a5d8d956c1fb7f32b55 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com> Douglas Raillard committed on 14 Sep 2017
	edbd7bb Browse files » Merge pull request #1098 from vchong/boot_without_spd ... hikey*: boot without spd davidcunado-arm authored on 14 Sep 2017 GitHub committed on 14 Sep 2017
	b4567c1 Browse files » Merge pull request #1095 from soby-mathew/sm/fix_cert_create_build ... Set default value of USE_TBBR_DEFS davidcunado-arm authored on 14 Sep 2017 GitHub committed on 14 Sep 2017