uniphier: fix base address of IO block buffer ...

The current IO block buffer overlaps with BL2 image location.
So, BL2 may corrupt itself.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

doc: uniphier: reformat reStructuredText manually ...

Commit 6f6257476754 ("Convert documentation to reStructuredText")
automatically converted all documents by a tool.  I see some parts
were converted in an ugly way (or, at least, it is not my intention).
Also, the footnote is apparently broken.

I checked this document by my eyes, and reformated it so that it looks
nicer both in plain text and reST form.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge pull request #1195 from davidcunado-arm/dc/fix_pie ...

Disable PIE compilation option

Merge pull request #1194 from robertovargas-arm/io-fix ...

io: block: fix block_read/write may read/write overlap buffer

Merge pull request #1192 from sandrine-bailleux-arm/sb/fix-mm-communicate ...

SPM: Fix MM_COMMUNICATE_AARCH32/64 parameters

Merge pull request #1190 from vchong/poplar_hisi_review2 ...

poplar: Add BL32 (OP-TEE) support and misc updates

Disable PIE compilation option ...

ARM TF does not work correctly if built with a version of gcc
that is configured to use PIE by default (e.g. Debian Stretch).

This patch identifies when such a version of gcc is being used
(by searching for --enable-default-pie) and adds -fno-PIE option
to TF_CFLAGS.

fixes arm-software/tf-issues#519

Change-Id: I2322122c49841746d35d152694e14f6f73beb0fd
Signed-off-by: David Cunado <david.cunado@arm.com>
Co-Authored-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Steve Capper <steve.capper@arm.com>
Tested-by: Alexei Fedorov <alexei.fedorov@arm.com>

Merge pull request #1104 from nmenon/dtb_build-v2 ...

Makefile: Add ability to build dtb (v2)

io: block: fix block_read/write may read/write overlap buffer ...

The block operations were trying to optimize the number of memory
copies, and it tried to use directly the buffer supplied by the user
to them. This was a mistake because it created too many corner cases:

	1- It was possible to generate unaligned
	   operations to unaligned buffers. Drivers that were using
	   DMA transfer failed in that case.

	2- It was possible to generate read operations
	   with sizes that weren't a multiple of the block size. Some
	   low level drivers assumed that condition and they calculated
	   the number of blocks dividing the number of bytes by the
	   size of the block, without considering the remaining bytes.

	3- The block_* operations didn't control the
	   number of bytes actually copied to memory, because the
	   low level drivers were writing directly to the user buffer.

This patch rewrite block_read and block_write to use always the device
buffer, which the platform ensures that has the correct aligment and
the correct size.

Change-Id: I5e479bb7bc137e6ec205a8573eb250acd5f40420
Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

SPM: Fix MM_COMMUNICATE_AARCH32/64 parameters ...

This partially reverts commit d6b532b50f8, keeping only the fixes to
the assertions. The changes related to the order of arguments passed
to the secure partition were not correct and violated the
specification of the SP_EVENT_COMPLETE SMC.

This patch also improves the MM_COMMUNICATE argument validation.  The
cookie argument, as it comes from normal world, can't be trusted and thus
needs to always be validated at run time rather than using an assertion.

Also validate the communication buffer address and return
INVALID_PARAMETER if it is zero, as per the MM specification.

Fix a few typos in comments and use the "secure partition" terminology
rather than "secure payload".

Change-Id: Ice6b7b5494b729dd44611f9a93d362c55ab244f7
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

poplar: Add BL32 (OP-TEE) support ...

Signed-off-by: Victor Chong <victor.chong@linaro.org>

Poplar: Initialize security properties of IP blocks. ...

The security properties of some IP blocks are configured to secure mode
after reset. This means these IP blocks can only be accessed by cpus
in secure state by default. These should be configured correclty as needed.

Signed-off-by: y00241285 <yyangwei.yangwei@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>

poplar: Increase FIP_SIZE ...

This is currently the maximum allowed without affecting bootup.

Signed-off-by: Victor Chong <victor.chong@linaro.org>

poplar: Rename PLAT_ARM_NS_IMAGE_OFFSET ...

to PLAT_POPLAR_NS_IMAGE_OFFSET

Signed-off-by: Victor Chong <victor.chong@linaro.org>

poplar: Fix GPIO_MAX ...

Per
https://github.com/sdrobertw/Poplar/blob/master/HardwareDocs/Processor_Datasheet_v2XX.pdf
there are 13 groups of GPIO controllers, not 12.

Signed-off-by: Victor Chong <victor.chong@linaro.org>

Merge pull request #1178 from davidcunado-arm/dc/enable_sve ...

Enable SVE for Non-secure world

Merge pull request #1187 from antonio-nino-diaz-arm/an/spm-xlat-dram ...

SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAM

Merge pull request #1184 from antonio-nino-diaz-arm/an/bl31-in-dram ...

fvp: Disable SYSTEM_SUSPEND when ARM_BL31_IN_DRAM

Merge pull request #1183 from jeenu-arm/sdei-reset-fix ...

SDEI: Fix return value of reset calls

Merge pull request #1186 from antonio-nino-diaz-arm/an/poplar-doc ...

poplar: Fix format of documentation

Merge pull request #1182 from soby-mathew/sm/opt_tbbr_flush ...

Unify cache flush code path after image load

Merge pull request #1181 from soby-mathew/sm/el3_payload_tzc_permissions ...

ARM Platforms: Change the TZC access permissions for EL3 payload

Merge pull request #1180 from sandrine-bailleux-arm/sb/spm-rename ...

Rename some macros in SPM code

Merge pull request #1179 from paulkocialkowski/integration ...

rockchip: Include stdint header in plat_sip_calls.c

Merge pull request #1174 from antonio-nino-diaz-arm/an/page-size ...

Replace magic numbers in linkerscripts by PAGE_SIZE

Merge pull request #1171 from Leo-Yan/hikey960-change-use-recommend-state-id ...

Hikey960: Change to use recommended power state id format

Merge pull request #1185 from danh-arm/dh/rk-maint ...

Miscellaneous fixes to maintainers.rst

Miscellaneous fixes to maintainers.rst ...

* Update the RockChip sub-maintainer from rkchrome to rockchip-linux
in maintainers.rst.

* Add missing documentation files and change extensions from `md` to `rst`.

* Add sub-maintainer for Socionext UniPhier platform.

Change-Id: I7f498316acb0f7947c6432dbe14988e61a8903fe
Co-Authored-By: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Dan Handley <dan.handley@arm.com>

SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAM ...

A new platform define, `PLAT_SP_IMAGE_XLAT_SECTION_NAME`, has been
introduced to select the section where the translation tables used by
the S-EL1/S-EL0 are placed.

This define has been used to move the translation tables to DRAM secured
by TrustZone.

Most of the extra needed space in BL31 when SPM is enabled is due to the
large size of the translation tables. By moving them to this memory
region we can save 44 KiB.

A new argument has been added to REGISTER_XLAT_CONTEXT2() to specify the
region where the translation tables have to be placed by the linker.

Change-Id: Ia81709b4227cb8c92601f0caf258f624c0467719
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1177 from sivadur/master ...

Update Xilinx maintainer details