LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

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2018-02-28	Unverified 73a9605 Browse files » Merge pull request #1282 from robertovargas-arm/misra-changes ... Misra changes davidcunado-arm authored on 28 Feb 2018 GitHub committed on 28 Feb 2018
2018-02-28	7fabe1a Browse files » Fix MISRA rule 8.4 in common code ... Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined. Change-Id: I26e042cb251a6f9590afa1340fdac73e42f23979 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com> Roberto Vargas committed on 28 Feb 2018
2018-02-27	Unverified 99e198e Browse files » Merge pull request #1284 from jeenu-arm/tspd-ehf ... TSPD and EHF davidcunado-arm authored on 27 Feb 2018 GitHub committed on 27 Feb 2018
	472be0f Browse files » TSPD: Register preempted SMC error code with EHF ... An earlier patch extended ehf_allow_ns_preemption() API to also register an error code to offer to Non-secure when a Yielding SMC is preempted by SDEI interrupt. In TSPD's case, register the error code TSP_PREEMPTED. Change-Id: I31992b6651f80694e83bc5092b044ef7a3eda690 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 27 Feb 2018
	8e3032f Browse files » SDEI: Pop dispatch context only after error checking ... Currently, when the client attempts to do SDEI_EVENT_COMPLETE or SDEI_EVENT_COMPLETE_AND_RESUME, the dispatcher pops off the outstanding dispatch context for sanity check. There are however other checks following this, which could potentially return failure. If that happens, by popping the context, the dispatcher has inadvertently discarded a valid context. This patch fixes this bug by inspecting (not actually popping) the outstanding context. The context is popped only after all error checks are completed. Change-Id: Ie199f6442f871a8177a8247a0c646543bad76d21 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 27 Feb 2018
2018-02-21	6bf0e07 Browse files » Ensure the correct execution of TLBI instructions ... After executing a TLBI a DSB is needed to ensure completion of the TLBI. rk3328: The MMU is allowed to load TLB entries for as long as it is enabled. Because of this, the correct place to execute a TLBI is right after disabling the MMU. Change-Id: I8280f248d10b49a8c354a4ccbdc8f8345ac4c170 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 21 Feb 2018
2018-02-14	fb1198b Browse files » Remove URLs from comments ... This fixes all defects according to MISRA Rule 3.1: "The character sequences /* and // shall not be used within a comment". This affects all URLs in comments, so they have been removed: - The link in `sdei_state.c` can also be found in the documentation file `docs/sdei.rst`. - The bug that the file `io_fip.c` talks about doesn't affect the currently supported version of GCC, so it doesn't make sense to keep the comment. Note that the version of GCC officially supported is the one that comes with Linaro Release 17.10, which is GCC 6.2. - The link in `tzc400.c` was broken, and it didn't correctly direct to the Technical Reference Manual it should. The link has been replaced by the title of the document, which is more convenient when looking for the document. Change-Id: I89f60c25f635fd4c008a5d3a14028f814c147bbe Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 14 Feb 2018
2018-02-06	6027796 Browse files » TSPD: Require NS preemption along with EL3 exception handling ... At present, the build option TSP_NS_INTR_ASYNC_PREEMPT controls how Non-secure interrupt affects TSPs execution. When TSP is executing: 1. When TSP_NS_INTR_ASYNC_PREEMPT=0, Non-secure interrupts are received at the TSP's exception vector, and TSP voluntarily preempts itself. 2. When TSP_NS_INTR_ASYNC_PREEMPT=1, Non-secure interrupts causes a trap to EL3, which preempts TSP execution. When EL3 exception handling is in place (i.e., EL3_EXCEPTION_HANDLING=1), FIQs are always trapped to EL3. On a system with GICv3, pending NS interrupts while TSP is executing will be signalled as FIQ (which traps to EL3). This situation necessitates the same treatment applied to case (2) above. Therefore, when EL3 exception handling is in place, additionally require that TSP_NS_INTR_ASYNC_PREEMPT is set to one 1. Strictly speaking, this is not required on a system with GICv2, but the same model is uniformly followed regardless, for simplicity. Relevant documentation updated. Change-Id: I928a8ed081fb0ac96e8b1dfe9375c98384da1ccd Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 6 Feb 2018
2018-02-06	1dd022c Browse files » TSPD: Explicitly allow NS preemption for Yielding SMCs ... When EL3 exception handling is in effect (i.e., EL3_EXCEPTION_HANDLING=1), Non-secure interrupts can't preempt Secure execution. However, for yielding SMCs, preemption by Non-secure interupts is intended. This patch therefore adds a call to ehf_allow_ns_preemption() before dispatching a Yielding SMC to TSP. Change-Id: Ia3a1ae252f3adc0f14e6d7e0502f251bdb349bdf Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 6 Feb 2018
2018-01-29	3a1b067 Browse files » Implement support for SMCCC v1.1 ... SMCCC v1.1 comes with a relaxed calling convention for AArch64 callers. The caller only needs to save x0-x3 before doing an SMC call. This patch adds support for SMCCC_VERSION and SMCCC_ARCH_FEATURES. Refer to "Firmware Interfaces for mitigating CVE_2017_5715 System Software on Arm Systems"[0] for more information. [0] https://developer.arm.com/-/media/developer/pdf/ARM%20DEN%200070A%20Firmware%20interfaces%20for%20mitigating%20CVE-2017-5715_V1.0.pdf Change-Id: If5b1c55c17d6c5c7cb9c2c3ed355d3a91cdad0a9 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com> Dimitris Papastamos committed on 29 Jan 2018
2018-01-15	Unverified 759a7be Browse files » Merge pull request #1219 from antonio-nino-diaz-arm/an/mm-version ... SPM: Fix version header definitions davidcunado-arm authored on 15 Jan 2018 GitHub committed on 15 Jan 2018
2018-01-10	a5b4c40 Browse files » SPM: Fix version header definitions ... Rename SP_VERSION macros to MM_VERSION, which is the name used in the MM specification [1]. Also, a few more helper macros have been added. MM-specific definitions have been moved to their own header file. [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0060a/DEN0060A_ARM_MM_Interface_Specification.pdf Change-Id: Ia10e48c7e81a7a1f5eeca29a5270cae740a4a88a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 10 Jan 2018
2018-01-08	62d862e Browse files » spd: tlkd: support for "NS memory ranges" function ID ... This patch adds support to receive function ID with NS world's memory ranges to provide the memory snapshot to TLK. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Varun Wadekar committed on 8 Jan 2018
	a43c85d Browse files » SPM: Allow secondary CPUs to use the Secure Partition ... The Secure Partition should be able to be used from any CPU, not just the lead one. This patch point the secure contexts of all secondary CPUs to the same one used by the lead CPU for the Secure Partition. This way, they can also use it. In order to prevent more than one CPU from using the Secure Partition at the same time, a lock has been added. Change-Id: Ica76373127c3626498b06c558a4874ce72201ff7 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 8 Jan 2018
	26bd5f8 Browse files » SPM: Move initialization flag to context struct ... Whether a Secure Partition is being initialized or not is something related to that specific partition, so it should be saved with the rest of the information related to it. Change-Id: Ie8a780f70df83fb03ef9c01ba37960208d9b5319 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 8 Jan 2018
2017-12-12	4d2787c Browse files » SPM: Fix MM_COMMUNICATE_AARCH32/64 parameters ... This partially reverts commit d6b532b50f8, keeping only the fixes to the assertions. The changes related to the order of arguments passed to the secure partition were not correct and violated the specification of the SP_EVENT_COMPLETE SMC. This patch also improves the MM_COMMUNICATE argument validation. The cookie argument, as it comes from normal world, can't be trusted and thus needs to always be validated at run time rather than using an assertion. Also validate the communication buffer address and return INVALID_PARAMETER if it is zero, as per the MM specification. Fix a few typos in comments and use the "secure partition" terminology rather than "secure payload". Change-Id: Ice6b7b5494b729dd44611f9a93d362c55ab244f7 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 12 Dec 2017
2017-12-10	Unverified 83df7ce Browse files » Merge pull request #1187 from antonio-nino-diaz-arm/an/spm-xlat-dram ... SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAM davidcunado-arm authored on 10 Dec 2017 GitHub committed on 10 Dec 2017
2017-12-09	Unverified 9f0ee04 Browse files » Merge pull request #1184 from antonio-nino-diaz-arm/an/bl31-in-dram ... fvp: Disable SYSTEM_SUSPEND when ARM_BL31_IN_DRAM davidcunado-arm authored on 9 Dec 2017 GitHub committed on 9 Dec 2017
2017-12-09	Unverified 62854fc Browse files » Merge pull request #1183 from jeenu-arm/sdei-reset-fix ... SDEI: Fix return value of reset calls davidcunado-arm authored on 9 Dec 2017 GitHub committed on 9 Dec 2017
2017-12-06	45d640f Browse files » SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAM ... A new platform define, `PLAT_SP_IMAGE_XLAT_SECTION_NAME`, has been introduced to select the section where the translation tables used by the S-EL1/S-EL0 are placed. This define has been used to move the translation tables to DRAM secured by TrustZone. Most of the extra needed space in BL31 when SPM is enabled is due to the large size of the translation tables. By moving them to this memory region we can save 44 KiB. A new argument has been added to REGISTER_XLAT_CONTEXT2() to specify the region where the translation tables have to be placed by the linker. Change-Id: Ia81709b4227cb8c92601f0caf258f624c0467719 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 6 Dec 2017
	2633dfe Browse files » SPM: Remove ARM platforms header from SPM common code ... Common code mustn't include ARM platforms headers. Change-Id: Ib6e4f5a77c2d095e6e8c3ad89c89cb1959cd3043 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 6 Dec 2017
	ad55b97 Browse files » SDEI: Fix return value of reset calls ... At present, both SDEI_PRIVATE_RESET and SDEI_SHARED_RESET returns SDEI_PENDING if they fail to unregister an event. The SDEI specification however requires that the APIs return SDEI_EDENY in these cases. This patch fixes the return codes for the reset APIs. Change-Id: Ic14484c91fa8396910387196c256d1ff13d03afd Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 6 Dec 2017
2017-12-05	756a2a0 Browse files » SPM: Rename SP_COMMUNICATE macros ... Rename SP_COMMUNICATE_AARCH32/AARCH64 into MM_COMMUNICATE_AARCH32/AARCH64 to align with the MM specification [1]. [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0060a/DEN0060A_ARM_MM_Interface_Specification.pdf Change-Id: I478aa4024ace7507d14a5d366aa8e20681075b03 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Sandrine Bailleux committed on 5 Dec 2017
2017-12-05	fa0ed2b Browse files » SPM: Rename SP_MEM_ATTR*** defines ... The defines have been renamed to match the names used in the documentation. Change-Id: I2f18b65112d2db040a89d5a8522e9790c3e21628 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz authored on 1 Dec 2017 Sandrine Bailleux committed on 5 Dec 2017
2017-11-23	Unverified d162a27 Browse files » Merge pull request #1169 from antonio-nino-diaz-arm/an/spm-fixes ... SPM fixes davidcunado-arm authored on 23 Nov 2017 GitHub committed on 23 Nov 2017
2017-11-20	f1a67d0 Browse files » SDEI: Assert that dynamic events have Normal priority ... The SDEI specification requires that binding a client interrupt dispatches SDEI Normal priority event. This means that dynamic events can't have Critical priority. Add asserts for this. Change-Id: I0bdd9e0e642fb2b61810cb9f4cbfbd35bba521d1 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 20 Nov 2017
2017-11-20	424fc73 Browse files » SDEI: Fix security state check for explicit dispatch ... Change-Id: Ic381ab5d03ec68c7f6e8d357ac2e2cbf0cc6b2e8 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 20 Nov 2017
2017-11-15	d6b532b Browse files » SPM: Fix SP_COMMUNICATE_AARCH32/64 parameters ... The parameters passed to the Secure world from the Secure Partition Manager when invoking SP_COMMUNICATE_AARCH32/64 were incorrect, as well as the checks done on them. Change-Id: I26e8c80cad0b83437db7aaada3d0d9add1c53a78 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 15 Nov 2017
2017-11-15	9efd6e5 Browse files » SPM: Fix calculation of max page granularity ... The code was incorrectly reading from ID_AA64PRF0_EL1 instead of ID_AA64MMFR0_EL1 causing the supported granularity sizes returned by the code to be wrong. This wasn't causing any problem because it's just used to check the alignment of the base of the buffer shared between Non-secure and Secure worlds, and it was aligned to more than 64 KiB, which is the maximum granularity supported by the architecture. Change-Id: Icc0d949d9521cc0ef13afb753825c475ea62d462 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Antonio Nino Diaz committed on 15 Nov 2017
2017-11-13	897f04e Browse files » SDEI: Fix build error with logging enabled ... Change-Id: Iee617a3528225349b6eede2f8abb26da96640678 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Jeenu Viswambharan committed on 13 Nov 2017