plat: zynqmp: Let fsbl_atf_handover() return an error status ...

Instead of calling panic() in fsbl_atf_handover() return the error
status so that bl31_early_platform_setup() can act accordingly.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

Include "bl_common.h" in Xilinx zynqmp_private.h ...

Type "entry_point_info_t" is used in zynqmp_private.h. It is defined
in "bl_common.h". The header file which defines the type should be
included.

Signed-off-by: Wendy Liang <jliang@xilinx.com>

zynqmp: pm: Added APIs for xilsecure linux support ...

Added SHA to calculate SHA3 hash,RSA to encrypt data with
public key and decrypt with private key and AES to do symmetric
encryption with User key or device key.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

plat: zynqmp: Add support for CG/EG/EV device detection ...

Read ipdisable reg which needs to be used for cg/eg/ev device detection.
ATF runs in EL3 that's why this read can be done directly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

aarch64: zynqmp: Add new Ids for RFSoC ...

Add new id codes for RFSoC's.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zynqmp: Fix CSU ID SVD mask fo getting chip ID ...

This patch corrects the SVD mask for getting chip ID
using 0xe is wrong and 0x7 is correct.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

zynqmp: pm: Allow to set shutdown scope via pm_system_shutdown API ...

psci system_reset and system_off calls now retrieve shutdown scope on
the fly. The default scope is system, but it can be changed by calling
pm_system_shutdown(2, scope)

Until full support for different restart scopes becomes available with
PSCI 1.1 this change allows users to set the reboot scope to match
their application needs.

Possible scope values:
0 - APU subsystem: does not affect RPU, PMU or PL
1 - PS only: shutdown/restart entire PS without affecting PL
2 - System: shutdown/restart applies to entire system

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Davorin Mista <davorin.mista@aggios.com>

zynqmp: pm: Implement PM_INIT_FINALIZE PM API call ...

The PM_INIT_FINALIZE PM API is required to inform the PFW that APU is
done with requesting nodes and that not-requested nodes can be powered
down. If PM is not enabled, this call will never be made and PFW will
never power down any of the nodes which APU can use.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

zynqmp: pm: Rename PM_INIT to PM_INIT_FINALIZE ...

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

zynqmp: pm: Implemented new pm API to load secure images ...

This patch adds pm_secure_rsaaes() API to provide access to
the xilsecure library for loading secure images

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

xilinx: zynqmp: Read bootmode register using PM API ...

Read boot mode register using pm_mmio_read if pmu is
present otherwise access it directly using mmio_read_32().

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

zynqmp: pm: Decode start address related SMC arguments for pm_req_wakeup ...

The pm_req_wakeup PM API accepts start address (64-bit unsiged integer)
and a flag stating if address should be used. To save an argument
of the SMC call, flag is encoded in the LSB of the address, since
addresses are word aligned.
Decode start address and use-address flag in the PM SMC handler and
pass them to pm_req_wakeup.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>

zynqmp: pm: Move pm_client_wakeup call from pm_req_wakeup ...

Call to pm_client_wakeup from pm_req_wakeup prevented the PM API
call to be used to wake up non-APU processor (e.g. from higher ELs),
since it clears power down request for specified APU processor.
Move this function out of pm_client_wakeup to allow passing wake up
requests to the PMU for other processor in the system.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>

zynqmp: pm: Remove unused NODE_AFI, add NODE_EXTERN ...

NODE_EXTERN is the slave node which represents an external wake
source.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>

zynqmp: pm: Add support for setting suspend-to-RAM mode ...

Beside standard suspend-to-RAM state, Zynq MPSoC supports
suspend-to-RAM state with additional power savings, called
power-off suspend-to-RAM. If this mode is set, only NODE_EXTERN
must be set as wake source. Standard suspend-to-RAM procedure
is unchanged.

This patch adds support for setting suspend mode from higher
ELs and ensuring that all conditions for power-off suspend mode
are set.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

zynqmp: pm: Implement pm_get_node_status API function ...

pm_get_node_status API function returns 3 values:
-status: Current power state of the node
-requirements: Current requirements for the node
-usage: Current usage of the node
The last two values only apply to slave nodes.

Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>

types: use int-ll64 for both aarch32 and aarch64 ...

Since commit 031dbb122472 ("AArch32: Add essential Arch helpers"),
it is difficult to use consistent format strings for printf() family
between aarch32 and aarch64.

For example, uint64_t is defined as 'unsigned long long' for aarch32
and as 'unsigned long' for aarch64.  Likewise, uintptr_t is defined
as 'unsigned int' for aarch32, and as 'unsigned long' for aarch64.

A problem typically arises when you use printf() in common code.

One solution could be, to cast the arguments to a type long enough
for both architectures.  For example, if 'val' is uint64_t type,
like this:

  printf("val = %llx\n", (unsigned long long)val);

Or, somebody may suggest to use a macro provided by <inttypes.h>,
like this:

  printf("val = %" PRIx64 "\n", val);

But, both would make the code ugly.

The solution adopted in Linux kernel is to use the same typedefs for
all architectures.  The fixed integer types in the kernel-space have
been unified into int-ll64, like follows:

    typedef signed char           int8_t;
    typedef unsigned char         uint8_t;

    typedef signed short          int16_t;
    typedef unsigned short        uint16_t;

    typedef signed int            int32_t;
    typedef unsigned int          uint32_t;

    typedef signed long long      int64_t;
    typedef unsigned long long    uint64_t;

[ Linux commit: 0c79a8e ]

This gets along with the codebase shared between 32 bit and 64 bit,
with the data model called ILP32, LP64, respectively.

The width for primitive types is defined as follows:

                   ILP32           LP64
    int            32              32
    long           32              64
    long long      64              64
    pointer        32              64

'long long' is 64 bit for both, so it is used for defining uint64_t.
'long' has the same width as pointer, so for uintptr_t.

We still need an ifdef conditional for (s)size_t.

All 64 bit architectures use "unsigned long" size_t, and most 32 bit
architectures use "unsigned int" size_t.  H8/300, S/390 are known as
exceptions; they use "unsigned long" size_t despite their architecture
is 32 bit.

One idea for simplification might be to define size_t as 'unsigned long'
across architectures, then forbid the use of "%z" string format.
However, this would cause a distortion between size_t and sizeof()
operator.  We have unknowledge about the native type of sizeof(), so
we need a guess of it anyway.  I want the following formula to always
return 1:

  __builtin_types_compatible_p(size_t, typeof(sizeof(int)))

Fortunately, ARM is probably a majority case.  As far as I know, all
32 bit ARM compilers use "unsigned int" size_t.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Fix pointer type mismatch of handlers ...

Commit 4c0d03907652 ("Rework type usage in Trusted Firmware") changed
the type usage in struct declarations, but did not touch the definition
side.  Fix the type mismatch.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge pull request #1250 from jollysxilinx/zynqmp-new-eemi-api ...

plat/xilinx: Add support for new platform management APIs for ZynqMP

plat: fix switch statements to comply with MISRA rules ...

Ensure (where possible) that switch statements in plat comply with MISRA
rules 16.1 - 16.7.

Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>

zynqmp: pm: Minor corrections for MISRA compliance ...

Various changes to comply with MISRA static analysis rules

Signed-off-by: Jolly Shah <jollys@xilinx.com>

zynqmp: pm_service: Support multiple SDIO modes ...

Existing database allows to set only single mode for SDIO.
SDIO can have different groups (8 bit, 4 bit and 1 bit).
As there is only single SDIO group in each pin, it is not
 possible to use different mode groups for SDIO.

Extend database in generic way to allow multiuple function
groups in single pin. Add different SDIO groups to pins and
create separate functions for each modes.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>

zynqmp: pm: Support ATF PM version check ...

Add SMC call to query ATF PM version. This version
can be used by Linux to match with expected version.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>

zynqmp: pm: Update API version to 1.0 ...

With new EEMI APIs addition, version is updated to 1.0

Signed-off-by: Jolly Shah <jollys@xilinx.com>

zynqmp: Use DDR memory when DEBUG is enabled ...

Define default DDR location to which ATF has to compiled
if DEBUG option is enabled. This is required now, as the ATF cant fit
in OCM with DEBUG option enabled. The default value is 0x1000 and can be
used till 0x7ffff. User can still override as per wish/requirement
using current commandline options.

Signed-off-by: Jolly Shah <jollys@xilinx.com>

zynqmp: pm: Add APIs for pin control queries ...

Add pin control APIs which driver can use to query
pin information from firmware. Using these APIs,
driver do not need to maintain hard-coded pin database.

Major changes in patch are:
- Add pin database with pins, functions and function groups
  information
- Implement APIs for pin information queries
- Update pin control APIs for get/set functions to use new
  pin control database. Remove pin database which was added
  earlier.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

zynqmp: pm: Add IOCTLs for global storage access ...

Add IOCTLs to read/write global general storage and
persistent global general storage registers access.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

zynqmp: pm: Implement clock APIs ...

- Add clock entries and information to clock database.
- Implement APIs to provide clock topology and other
  information to caller.
- Implement APIs to control clocks and PLLs.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

zynqmp: pm: Add clock control EEMI API and ioctl functions ...

These are empty functions with no logic right now. Code
will be added in subsequent commits.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>

zynqmp: pm: Implement IOCTL APIs for device control ...

Implement ioctl APIs which uses MMIO operations
to configure devices. Below IOCTLs are supported
in this patch:
  * Set tap delay bypass
  * Set SGMII mode
  * SD reset
  * Set SD/MMC tap delay

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>