2019-01-21 |
ti: k3: common: Allow customizing UART baud rate using build options
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To accommodate scenarios where we want to use a UART baud rate other than
the default 115,200 allow the associated compiler definition to be set
via the K3_USART_BAUD build option by updating the platform make file.
Since the platform make file now also contains the default value (still
115,200), go ahead and remove the redundant definition from the platform
header file.
Suggested-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Andreas Dannenberg
authored
on 14 Jan 2019
Andrew F. Davis
committed
on 21 Jan 2019
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ti: k3: drivers: ti_sci: Clear receive queue before transmitting
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Send and receive currently must be be serialized, any message already in
the receive queue when a new message is to be sent will cause a mismatch
with the expected response from this new message. Clear out all messages
from the response queue before sending a new request.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Andrew F. Davis
committed
on 21 Jan 2019
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ti: k3: drivers: sec_proxy: Allow clearing a Secure Proxy receive thread
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It can be needed to discard all messages in a receive queue. This
can be used during some error recovery situations.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Andrew F. Davis
committed
on 21 Jan 2019
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ti: k3: common: Use shutdown API for PSCI core poweroff
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To ensure WFI is reached before the PSC is trigger to power-down
a processor, the shutdonw API must be used.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Andrew F. Davis
committed
on 21 Jan 2019
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ti: k3: drivers: ti_sci: Add processor shutdown API
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This is a pseudo-API command consisting of a wait processor status
command and a set device state command queued back-to-back without
waiting for the System Firmware to ACK either message.
This is needed as the K3 power down specification states the System
Firmware must wait for a processor to be in WFI/WFE before powering
it down. The current implementation of System Firmware does not provide
such a command. Also given that with PSCI the core to be shutdown is the
core that is processing the shutdown request, the core cannot itself wait
for its own WFI/WFE status. To workaround this limitation, we submit
a wait processor status command followed by the actual shutdown command.
The shutdown command will not be processed until the wait command has
finished. In this way we can continue to WFI before the wait command
status has been met or timed-out and the shutdown command is processed.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Andrew F. Davis
committed
on 21 Jan 2019
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ti: k3: drivers: ti_sci: Add processor status wait API
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This TI-SCI API can be used wait for a set of processor status flags to
be set or cleared. The flags are processor type specific. This command
will not return ACK until the specified status is met. NACK will be
returned after the timeout elapses or on error.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Andrew F. Davis
committed
on 21 Jan 2019
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ti: k3: drivers: sec_proxy: Switch error messages
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The logic is correct here, but the error messages are
reversed, switch them.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Andrew F. Davis
committed
on 21 Jan 2019
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2019-01-04 |
Sanitise includes across codebase
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Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 4 Jan 2019
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2018-12-06 |
drivers/console: Link console framework code by default
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This patch makes the build system link the console framework code by
default, like it already does with other common libraries (e.g. cache
helpers). This should not make a difference in practice since TF is
linked with --gc-sections, so the linker will garbage collect all
functions and data that are not referenced by any other code. Thus, if a
platform doesn't want to include console code for size reasons and
doesn't make any references to console functions, the code will not be
included in the final binary.
To avoid compatibility issues with older platform ports, only make this
change for the MULTI_CONSOLE_API.
Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3
Signed-off-by: Julius Werner <jwerner@chromium.org>
Julius Werner
committed
on 6 Dec 2018
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2018-11-08 |
Standardise header guards across codebase
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All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver
- dt-bindings folders
- zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 8 Nov 2018
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2018-10-30 |
ti: k3: common: Remove use of ARM platform code
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A recent patch[0] has made setting up page tables into generic
code, complete the conversion for TI platforms by removing the
use of plat_arm_get_mmap() and using the mmap table directly.
[0] 0916c38deca4 ("Convert arm_setup_page_tables into a generic helper")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 30 Oct 2018
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2018-10-26 |
Convert arm_setup_page_tables into a generic helper
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This function is not related to Arm platforms and can be reused by other
platforms if needed.
Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8
Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Roberto Vargas
authored
on 19 Oct 2018
Antonio Nino Diaz
committed
on 26 Oct 2018
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2018-10-25 |
Add plat_crash_console_flush to platforms without it
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Even though at this point plat_crash_console_flush is optional, it will
stop being optional in a following patch.
The console driver of warp7 doesn't support flush, so the implementation
is a placeholder.
TI had ``plat_crash_console_init`` and ``plat_crash_console_putc``, but
they weren't global so they weren't actually used. Also, they were
calling the wrong functions.
imx8_helpers.S only has placeholders for all of the functions.
Change-Id: I8d17bbf37c7dad74e134c61ceb92acb9af497718
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 25 Oct 2018
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2018-10-16 |
ti: k3: common: Do not disable cache on TI K3 core powerdown
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Leave the caches on and explicitly flush any data that
may be stale when the core is powered down. This prevents
non-coherent interconnect access which has negative side-
effects on AM65x.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 16 Oct 2018
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2018-09-28 |
ti: k3: Migrate to new interfaces
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- Migrate to bl31_early_platform_setup2().
- Remove references to removed build options.
Change-Id: Ie9f149e3fdec935f9329402ed3dd8e1c00b8832c
Acked-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 28 Sep 2018
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2018-08-31 |
ti: k3: common: Add basic PSCI core off support
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Use TI-SCI messages to request core power down from system controller
firmware.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 31 Aug 2018
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2018-08-22 |
ti: k3: common: Add basic PSCI reset support
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Use TI-SCI messages to request reset from system controller firmware.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 22 Aug 2018
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ti: k3: common: Add basic PSCI core on support
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Use TI-SCI messages to request core start from system controller
firmware.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 22 Aug 2018
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ti: k3: drivers: ti_sci: Add support for Processor control
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TI-SCI message protocol provides support for controlling of various
physical cores available in the SoC. In order to control which host is
capable of controlling a physical processor core, there is a processor
access control list that needs to be populated as part of the board
configuration data.
Introduce support for the set of TI-SCI message protocol APIs that
provide us with this capability of controlling physical cores.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis
committed
on 22 Aug 2018
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ti: k3: drivers: ti_sci: Add support for Core control
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Since system controller now has control over SoC power management, core
operation such as reset need to be explicitly requested to reboot the SoC.
Add support for this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis
committed
on 22 Aug 2018
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ti: k3: drivers: ti_sci: Add support for Clock control
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TI-SCI message protocol provides support for management of various
hardware entities within the SoC.
In general, we expect to function at a device level of abstraction,
however, for proper operation of hardware blocks, many clocks directly
supplying the hardware block needs to be queried or configured.
Introduce support for the set of TI-SCI message protocol support that
provide us with this capability.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis
committed
on 22 Aug 2018
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ti: k3: drivers: ti_sci: Add support for Device control
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TI-SCI message protocol provides support for management of various
hardware entitites within the SoC.
We introduce the fundamental device management capability support to
the driver protocol as part of this change.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis
committed
on 22 Aug 2018
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ti: k3: drivers: Add support for TI System Control Interface protocol
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Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used in Texas Instrument's System on Chip (SoC) such as those
in K3 family AM654x SoCs to communicate between various compute
processors with a central system controller entity.
TI-SCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis
committed
on 22 Aug 2018
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ti: k3: drivers: Add Secure Proxy driver
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Secure Proxy module manages hardware threads that are meant
for communication between the processor entities. Add support
for this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 22 Aug 2018
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2018-07-26 |
ti: k3: common: Only enable caches early
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We can enter and exit coherency without any software operations,
but HW_ASSISTED_COHERENCY has stronger implications that are
causing issues. Until these can be resolved, only use the weaker
WARMBOOT_ENABLE_DCACHE_EARLY flag.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 26 Jul 2018
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2018-07-25 |
Merge pull request #1486 from antonio-nino-diaz-arm/an/psci-misra
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Fix several MISRA defects in PSCI library
danh-arm
authored
on 25 Jul 2018
GitHub
committed
on 25 Jul 2018
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2018-07-24 |
Rework page table setup for varying number of mem regions
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Change arm_setup_page_tables() to take a variable number of memory
regions. Remove coherent memory region from BL1, BL2 and BL2U as
their coherent memory region doesn't contain anything and
therefore has a size of 0. Add check to ensure this
doesn't change without us knowing.
Change-Id: I790054e3b20b056dda1043a4a67bd7ac2d6a3bc0
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Daniel Boulby
committed
on 24 Jul 2018
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2018-07-20 |
PSCI: Fix types of definitions
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Also change header guards to fix defects of MISRA C-2012 Rule 21.1.
Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz
committed
on 20 Jul 2018
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2018-06-29 |
ti: k3: common: Enable interrupts before entering standby state
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To wake a core from wfi interrupts must be enabled, in some cases they
may not be and so we can lock up here. Unconditionally enable interrupts
before wfi and then restore interrupt state.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 29 Jun 2018
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ti: k3: common: Add root domain node to platform topology
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Actions may need to be taken by the last core when all clusters
have been shutdown. Add a top level root domain node to coordinate
this between clusters.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis
committed
on 29 Jun 2018
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