LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

2020-04-07	994421a Browse files » Merge changes from topics "af/fvp_gicv4", "af/gicv4", "af/gic_extended" into integration ... * changes: FVP: Add support for GICv4 extension TF-A: Add GICv4 extension for GIC driver TF-A GICv3 driver: Add extended PPI and SPI range Olivier Deprez authored on 7 Apr 2020 TrustedFirmware Code Review committed on 7 Apr 2020
	e6e10ec Browse files » FVP: Add support for GICv4 extension ... This patch adds support for GICv4 extension for FVP platform. Change-Id: Ia389b61266af669b1ca9b999a8b76476cab214f4 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 7 Apr 2020
	5875f26 Browse files » TF-A: Add GICv4 extension for GIC driver ... This patch adds support for GICv4 extension. New `GIC_ENABLE_V4_EXTN` option passed to gicv3.mk makefile was added, and enables GICv4 related changes when set to 1. This option defaults to 0. Change-Id: I30ebe1b7a98d3a54863900f37eda4589c707a288 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 7 Apr 2020
	91a7819 Browse files » Merge "coreboot: Add memory range parsing" into integration Sandrine Bailleux authored on 7 Apr 2020 TrustedFirmware Code Review committed on 7 Apr 2020
	579d1e9 Browse files » coreboot: Add memory range parsing ... This patch adds code to parse memory range information passed by coreboot, and a simple helper to test whether a specific address belongs to a range. This may be useful for coreboot-using platforms that need to know information about the system's memory layout (e.g. to check whether an address passed in via SMC targets valid DRAM). Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I3bea326c426db27d1a8b7d6e17418e4850e884b4 Julius Werner authored on 26 Mar 2020 Sandrine Bailleux committed on 7 Apr 2020
	9dfe46c Browse files » Increase maximum size of BL2 image ... Increased the maximum size of BL2 image in order to accommodate the BL2 image when TF-A build with no compiler optimization for ARM platform. Note: As of now, "no compiler optimization" build works only when TRUSTED_BOOT_BOARD option is set to 0. This change is verified using below CI configuration: 1. juno-no-optimize-default:juno-linux.uboot 2. fvp-no-optimize-default,fvp-default:fvp-tftf-fip.tftf-aemv8a-debug Change-Id: I5932621237f8acd1b510682388f3ba78eae90ea4 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Manish V Badarkhe authored on 2 Apr 2020 Sandrine Bailleux committed on 7 Apr 2020
	1150416 Browse files » locks: bakery: use is_dcache_enabled() helper ... bakery_lock_normal.c uses the raw register accessor, read_sctlr(_el3) to check whether the dcache is enabled. Using is_dcache_enabled() is cleaner, and a good abstraction for the library code like this. A problem is is_dcache_enabled() is declared in the local header, lib/xlat_tables_v2/xlat_tables_private.h I searched for a good place to declare this helper. Moving it to arch_helpers.h, closed to cache operation helpers, looks good enough to me. I also changed the type of 'is_cached' to bool for consistency, and to avoid MISRA warnings. Change-Id: I9b016f67bc8eade25c316aa9c0db0fa4cd375b79 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada authored on 2 Apr 2020 Sandrine Bailleux committed on 7 Apr 2020
2020-04-06	78460ce Browse files » Merge "stingray: Fix board configuration typo." Mark Dykes authored on 6 Apr 2020 TrustedFirmware Code Review committed on 6 Apr 2020
	8f3ad76 Browse files » TF-A GICv3 driver: Add extended PPI and SPI range ... This patch provides support for GICv3.1 extended PPI and SPI range. The option is enabled by setting to 1 and passing `GIC_EXT_INTID` build flag to gicv3.mk makefile. This option defaults to 0 with no extended range support. Change-Id: I7d09086fe22ea531c5df51a8a1efd8928458d394 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 6 Apr 2020
	a39493c Browse files » stingray: Fix board configuration typo. ... Default board configuration was set to bcm958742k which is not present in current codebase. This causes a default platform build to fail. Changing to bcm958742t. Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Ie24f94ef0ef316ff56fe142df5de45d70ba93c28 Max Shvetsov committed on 6 Apr 2020
2020-04-04	37d56d3 Browse files » Merge "Fix MISRA C issues in BL1/BL2/BL31" into integration Mark Dykes authored on 4 Apr 2020 TrustedFirmware Code Review committed on 4 Apr 2020
2020-04-03	083e123 Browse files » Merge "xlat_tables_v2: use get_current_el_maybe_constant() in is_dcache_enabled()" into integration Mark Dykes authored on 3 Apr 2020 TrustedFirmware Code Review committed on 3 Apr 2020
	3443a70 Browse files » Fix MISRA C issues in BL1/BL2/BL31 ... Attempts to address MISRA compliance issues in BL1, BL2, and BL31 code. Mainly issues like not using boolean expressions in conditionals, conflicting variable names, ignoring return values without (void), adding explicit casts, etc. Change-Id: If1fa18ab621b9c374db73fa6eaa6f6e5e55c146a Signed-off-by: John Powell <john.powell@arm.com> John Powell authored on 20 Mar 2020 johpow01 committed on 3 Apr 2020
	6e2b866 Browse files » Merge "arm_fpga: adapt to new way of including gicv3 files" into integration Alexei Fedorov authored on 3 Apr 2020 TrustedFirmware Code Review committed on 3 Apr 2020
	3e58803 Browse files » arm_fpga: adapt to new way of including gicv3 files ... with commit a6ea06f5, the way platform includes gicv3 files has been modified, this patch adapts to new method of including gicv3 files for arm_fpga platform. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ic5ccae842b39b7db06d4f23c5738b174c42edf63 Manish Pandey committed on 3 Apr 2020
	f4367eb Browse files » Merge "xlat lib v2: Add support to pass shareability attribute for normal memory region" into integration Manish Pandey authored on 3 Apr 2020 TrustedFirmware Code Review committed on 3 Apr 2020
	926cd70 Browse files » Merge changes from topic "brcm_initial_support" into integration ... * changes: doc: brcm: Add documentation file for brcm stingray platform drivers: Add SPI Nor flash support drivers: Add iproc spi driver drivers: Add emmc driver for Broadcom platforms Add BL31 support for Broadcom stingray platform Add BL2 support for Broadcom stingray platform Add bl31 support common across Broadcom platforms Add bl2 setup code common across Broadcom platforms drivers: Add support to retrieve plat_toc_flags Manish Pandey authored on 3 Apr 2020 TrustedFirmware Code Review committed on 3 Apr 2020
	06aca85 Browse files » xlat lib v2: Add support to pass shareability attribute for normal memory region ... Present framework restricts platform to pass desired shareability attribute for normal memory region mapped in MMU. it defaults to inner shareability. There are platforms where memories (like SRAM) are not placed at snoopable region in advaned interconnect like CCN/CMN hence snoopable transaction is not possible to these memory. Though These memories could be mapped in MMU as MT_NON_CACHEABLE, data caches benefits won't be available. If these memories are mapped as cacheable with non-shareable attribute, when only one core is running like at boot time, MMU data cached could be used for faster execution. Hence adding support to pass the shareability attribute for memory regions. Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com> Change-Id: I678cb50120a28dae4aa9d1896e8faf1dd5cf1754 Pramod Kumar committed on 3 Apr 2020
	fd1017b Browse files » doc: brcm: Add documentation file for brcm stingray platform ... Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Change-Id: I5e2c1220e9694d6ba771cc90daa0e70e967eebe6 Sheetal Tigadoli committed on 3 Apr 2020
	49dec7f Browse files » drivers: Add SPI Nor flash support ... Add SPI Nor flash support Change-Id: I0cde3fdb4dcad5bcaf445b3bb48e279332bd28af Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Sheetal Tigadoli committed on 3 Apr 2020
	e3ee7b7 Browse files » drivers: Add iproc spi driver ... Add iproc spi driver Change-Id: I652efab1efd9c487974dae9cb9d98b9b8e3759c4 Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Sheetal Tigadoli committed on 3 Apr 2020
	bffde63 Browse files » drivers: Add emmc driver for Broadcom platforms ... Add emmc driver for Broadcom platforms Change-Id: I126a6dfccd41062cb0b856f2c2fb1f724730b95e Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Sheetal Tigadoli committed on 3 Apr 2020
	3942d3a Browse files » Add BL31 support for Broadcom stingray platform ... Change-Id: Icfef5b6923dc292e637001045a334c499d346fe9 Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Sheetal Tigadoli committed on 3 Apr 2020
	f29d1e0 Browse files » Add BL2 support for Broadcom stingray platform ... Change-Id: I5daa3f2b4b9d85cb857547a588571a9aa8ad05c2 Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Sheetal Tigadoli committed on 3 Apr 2020
	9a40c0f Browse files » Add bl31 support common across Broadcom platforms ... Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Change-Id: Ic1a392a633b447935fa3a7528326c97845f5b1bc Sheetal Tigadoli committed on 3 Apr 2020
	33f1dd9 Browse files » Merge "uniphier: define PLAT_XLAT_TABLES_DYNAMIC only for BL2" into integration Sandrine Bailleux authored on 3 Apr 2020 TrustedFirmware Code Review committed on 3 Apr 2020
	8a53445 Browse files » Merge changes from topic "sb/fconf" into integration ... * changes: Check for out-of-bound accesses in the platform io policies Check for out-of-bound accesses in the CoT description Olivier Deprez authored on 3 Apr 2020 TrustedFirmware Code Review committed on 3 Apr 2020
	717448d Browse files » Add bl2 setup code common across Broadcom platforms ... Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com> Change-Id: Iabeaee35c22608c93945c8295bf70947b0f6049a Sheetal Tigadoli committed on 3 Apr 2020
2020-04-02	3cde15f Browse files » xlat_tables_v2: use get_current_el_maybe_constant() in is_dcache_enabled() ... Using get_current_el_maybe_constant() produces more optimized code because in most cases, we know the exception level at build-time. For example, BL31 runs at EL3, so unneeded code will be trimmed. [before] 0000000000000000 <is_dcache_enabled>: 0: d5384240 mrs x0, currentel 4: 53020c00 ubfx w0, w0, #2, #2 8: 7100041f cmp w0, #0x1 c: 54000081 b.ne 1c <is_dcache_enabled+0x1c> // b.any 10: d5381000 mrs x0, sctlr_el1 14: 53020800 ubfx w0, w0, #2, #1 18: d65f03c0 ret 1c: 7100081f cmp w0, #0x2 20: 54000061 b.ne 2c <is_dcache_enabled+0x2c> // b.any 24: d53c1000 mrs x0, sctlr_el2 28: 17fffffb b 14 <is_dcache_enabled+0x14> 2c: d53e1000 mrs x0, sctlr_el3 30: 17fffff9 b 14 <is_dcache_enabled+0x14> [after] 0000000000000000 <is_dcache_enabled>: 0: d53e1000 mrs x0, sctlr_el3 4: 53020800 ubfx w0, w0, #2, #1 8: d65f03c0 ret Change-Id: I3698fae9b517022ff9fbfd4cad3a320c6e137e10 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Masahiro Yamada committed on 2 Apr 2020
2020-04-02	cb2e35b Browse files » Merge changes from topic "macro-cleanup" into integration ... * changes: plat: remove redundant =1 from -D option Pass more -D options to BL_CPPFLAGS instead of BL_CFLAGS Mark Dykes authored on 2 Apr 2020 TrustedFirmware Code Review committed on 2 Apr 2020