// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) 2020 Ahmad Fatoum, Pengutronix
 */

#include "stm32mp157c-odyssey.dtsi"
#include "stm32mp151.dtsi"

/ {
	aliases {
		state = &state;
	};

	chosen {
		environment-sd {
			compatible = "barebox,environment";
			device-path = &sdmmc1, "partname:barebox-environment";
			status = "disabled";
		};

		environment-emmc {
			compatible = "barebox,environment";
			device-path = &sdmmc2, "partname:barebox-environment";
			status = "disabled";
		};

		state: state {
			magic = <0x12222013>;
			compatible = "barebox,state";
			backend-type = "raw";
			backend = <&state_mmc>;
			backend-stridesize = <1024>;
			#address-cells = <1>;
			#size-cells = <1>;

			bootstate {
				#address-cells = <1>;
				#size-cells = <1>;

				system0 {
					#address-cells = <1>;
					#size-cells = <1>;

					remaining_attempts {
						reg = <0x0 0x4>;
						type = "uint32";
						default = <3>;
					};
					priority {
						reg = <0x4 0x4>;
						type = "uint32";
						default = <21>;
					};
				};
				system1 {
					#address-cells = <1>;
					#size-cells = <1>;

					remaining_attempts {
						reg = <0x10 0x4>;
						type = "uint32";
						default = <3>;
					};
					priority {
						reg = <0x14 0x4>;
						type = "uint32";
						default = <20>;
					};
				};
				last_chosen {
					reg = <0x20 0x4>;
					type = "uint32";
				};
			};
		};
	};
};

&sdmmc2 {

	partitions {
		compatible = "fixed-partitions";
		#size-cells = <1>;
		#address-cells = <1>;

		state_mmc: partition@14400 {
			label = "state";
			reg = <0x14400 0x30000>;
		};
	};
};

&phy0 {
	reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>;
};

&ethernet0 {
        status = "okay";
        pinctrl-0 = <&ethernet0_rgmii_pins_a>;
        pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
        pinctrl-names = "default", "sleep";
        phy-mode = "rgmii-id";
        max-speed = <1000>;
        phy-handle = <&phy0>;
        assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>;
        assigned-clock-parents = <&rcc PLL4_P>;
        assigned-clock-rates = <125000000>;
        st,eth-clk-sel;

        mdio0 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "snps,dwmac-mdio";
                phy0: ethernet-phy@7 { /* KSZ9031RN */
                        reg = <7>;
                        reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; /* ETH_RST# */
                        reset-assert-us = <10000>;
                        reset-deassert-us = <300>;
                };
        };
};