* Mediatek UART APDMA Controller

Required properties:
- compatible should contain:
  * "mediatek,mt2712-uart-dma" for MT2712 compatible APDMA
  * "mediatek,mt6577-uart-dma" for MT6577 and all of the above

- reg: The base address of the APDMA register bank.

- interrupts: A single interrupt specifier.

- clocks : Must contain an entry for each entry in clock-names.
  See ../clocks/clock-bindings.txt for details.
- clock-names: The APDMA clock for register accesses

Examples:

	apdma: dma-controller@11000380 {
		compatible = "mediatek,mt2712-uart-dma";
		reg = <0 0x11000380 0 0x400>;
		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_SPI 65 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_SPI 66 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_SPI 67 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_SPI 68 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_SPI 69 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_SPI 70 IRQ_TYPE_LEVEL_LOW>;
		clocks = <&pericfg CLK_PERI_AP_DMA>;
		clock-names = "apdma";
		#dma-cells = <1>;
	};