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barebox / dts / src / arm64 / ti / k3-am654-base-board.dts
@Sascha Hauer Sascha Hauer on 14 Jan 2019 3 KB dts: update to v5.0-rc1
// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
 */

/dts-v1/;

#include "k3-am654.dtsi"

/ {
	compatible =  "ti,am654-evm", "ti,am654";
	model = "Texas Instruments AM654 Base Board";

	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
	};

	memory@80000000 {
		device_type = "memory";
		/* 4G RAM */
		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
		      <0x00000008 0x80000000 0x00000000 0x80000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		secure_ddr: secure_ddr@9e800000 {
			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};
	};
};

&wkup_pmx0 {
	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
			AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
		>;
	};
};

&main_pmx0 {
	main_uart0_pins_default: main-uart0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01e4, PIN_INPUT, 0)	/* (AF11) UART0_RXD */
			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0)	/* (AE11) UART0_TXD */
			AM65X_IOPAD(0x01ec, PIN_INPUT, 0)	/* (AG11) UART0_CTSn */
			AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0)	/* (AD11) UART0_RTSn */
		>;
	};

	main_i2c2_pins_default: main-i2c2-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
			AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
		>;
	};

	main_spi0_pins_default: main-spi0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
		>;
	};
};

&main_pmx1 {
	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
		>;
	};

	ecap0_pins_default: ecap0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "disabled";
};

&main_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
};

&wkup_i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_i2c0_pins_default>;
	clock-frequency = <400000>;

	pca9554: gpio@39 {
		compatible = "nxp,pca9554";
		reg = <0x39>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&main_i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

	pca9555: gpio@21 {
		compatible = "nxp,pca9555";
		reg = <0x21>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&main_i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;
};

&main_i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;
};

&ecap0 {
	pinctrl-names = "default";
	pinctrl-0 = <&ecap0_pins_default>;
};

&main_spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_spi0_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

	flash@0{
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <1>;
		spi-max-frequency = <48000000>;
		#address-cells = <1>;
		#size-cells= <1>;
	};
};