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barebox / dts / src / arm / zynq-zc706.dts
@Sascha Hauer Sascha Hauer on 5 May 2014 1 KB dts: update to v3.15-rc3
/*
 *  Copyright (C) 2011 Xilinx
 *  Copyright (C) 2012 National Instruments Corp.
 *  Copyright (C) 2013 Xilinx
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
/dts-v1/;
/include/ "zynq-7000.dtsi"

/ {
	model = "Zynq ZC706 Development Board";
	compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";

	memory {
		device_type = "memory";
		reg = <0 0x40000000>;
	};

	chosen {
		bootargs = "console=ttyPS0,115200 earlyprintk";
	};

};

&gem0 {
	status = "okay";
	phy-mode = "rgmii";
};

&i2c0 {
	status = "okay";
	clock-frequency = <400000>;

	i2cswitch@74 {
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x74>;

		i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
			si570: clock-generator@5d {
				#clock-cells = <0>;
				compatible = "silabs,si570";
				temperature-stability = <50>;
				reg = <0x5d>;
				factory-fout = <156250000>;
				clock-frequency = <148500000>;
			};
		};

		i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;
			eeprom@54 {
				compatible = "at,24c08";
				reg = <0x54>;
			};
		};

		i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;
			gpio@21 {
				compatible = "ti,tca6416";
				reg = <0x21>;
				gpio-controller;
				#gpio-cells = <2>;
			};
		};

		i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <4>;
			rtc@51 {
				compatible = "nxp,pcf8563";
				reg = <0x51>;
			};
		};

		i2c@7 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <7>;
			ucd90120@65 {
				compatible = "ti,ucd90120";
				reg = <0x65>;
			};
		};
	};
};

&sdhci0 {
	status = "okay";
};

&uart1 {
	status = "okay";
};