/*
 * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
 *
 * Based on an original 'vf610-twr.dts' which is Copyright 2015,
 * Freescale Semiconductor, Inc.
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License
 *     version 2 as published by the Free Software Foundation.
 *
 *     This file is distributed in the hope that it will be useful
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */



/dts-v1/;
#include "vf610-zii-dev.dtsi"

/ {
	model = "ZII VF610 CFU1 Switch Management Board";
	compatible = "zii,vf610cfu1-a", "zii,vf610dev", "fsl,vf610";

	aliases {
		/delete-property/ serial1;
		/delete-property/ serial2;
	};

	gpio-leds {
                debug {
                        gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>;
		};

		fail {
			label = "zii_fail";
			gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
			default-state = "off";
			max-brightness = <1>;
		};

		status {
			label = "zii_status";
			gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			max-brightness = <1>;
		};

		status_a {
			label = "zii_status_a";
			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			max-brightness = <1>;
		};

		status_b {
			label = "zii_status_b";
			gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
			default-state = "on";
			max-brightness = <1>;
		};
	};
};

&dspi1 {
	bus-num = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_dspi1>;
	status = "okay";

	m25p128@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "m25p128", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;

		partition@0 {
			label = "m25p128-0";
			reg = <0x0 0x01000000>;
		};
	};
};

&esdhc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_esdhc0>;
	bus-width = <8>;
	status = "okay";
};

&fec0 {
	status = "disabled";
};

&i2c0 {
	clock-frequency = <400000>;

	pca9554@22 {
		compatible = "nxp,pca9554";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

/delete-node/ &i2c1;
/delete-node/ &i2c2;
/delete-node/ &uart1;
/delete-node/ &uart2;

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_hog: hoggrp {
		fsl,pins = <
			VF610_PAD_PTE2__GPIO_107	0x31c2 /* SOC_SW_RSTn */
			VF610_PAD_PTB28__GPIO_98	0x31c1 /* E6352_INTn */

			/* PTE27 is wired to signal SD on part CONN
			* SFF-F4 via net FIM_DS. An active high
			* on this indicates a received optical
			* signal

			* SPEED=0b11 HIGH, SRE=0b0, ODE=0b0, HYS=0b0
			* DSE=0b001 150Ohm, PUS=0b10 100k UP
			* PKE=0b0, PUE=0b0, OBE=0b0, IBE=0b1
			*/
			VF610_PAD_PTE27__GPIO_132       0x3061

			/*
			* PTE13 is wired to signal T_DIS on part CONN
			* SFF-F4 via net FIM_TDIS. Setting this high
			* will disable optical output from the SFF-F4

			* SPEED=0b11 HIGH, SRE=0b0, ODE=0b0, HYS=0b0
			* DSE=0b001 150Ohm, PUS=0b00 100k DOWN
			* PKE=0b0, PUE=0b0, OBE=0b1, IBE=0b1
			* TODO: probably want IBE=0b0
			*/
			VF610_PAD_PTE13__GPIO_118       0x3043
		>;
	};

	pinctrl_dspi1: dspi1grp {
		fsl,pins = <
			VF610_PAD_PTD5__DSPI1_CS0	0x1182
			VF610_PAD_PTC6__DSPI1_SIN	0x1181
			VF610_PAD_PTC7__DSPI1_SOUT	0x1182
			VF610_PAD_PTC8__DSPI1_SCK	0x1182
		>;
	};

	pinctrl_esdhc0: esdhc0grp {
		fsl,pins = <
			VF610_PAD_PTC0__ESDHC0_CLK	0x31ef
			VF610_PAD_PTC1__ESDHC0_CMD	0x31ef
			VF610_PAD_PTC2__ESDHC0_DAT0	0x31ef
			VF610_PAD_PTC3__ESDHC0_DAT1	0x31ef
			VF610_PAD_PTC4__ESDHC0_DAT2	0x31ef
			VF610_PAD_PTC5__ESDHC0_DAT3	0x31ef
			VF610_PAD_PTD23__ESDHC0_DAT4	0x31ef
			VF610_PAD_PTD22__ESDHC0_DAT5	0x31ef
			VF610_PAD_PTD21__ESDHC0_DAT6	0x31ef
			VF610_PAD_PTD20__ESDHC0_DAT7	0x31ef
		>;
	};

	pinctrl_leds_debug: pinctrl-leds-debug {
		fsl,pins = <
			VF610_PAD_PTD3__GPIO_82			0x31c2
			VF610_PAD_PTE3__GPIO_108		0x31c2
			VF610_PAD_PTE4__GPIO_109		0x31c2
			VF610_PAD_PTE5__GPIO_110		0x31c2
			VF610_PAD_PTE6__GPIO_111		0x31c2
		>;
	};
};