#include <dt-bindings/clock/ath79-clk.h>

#include "skeleton.dtsi"

/ {
	ref: ref {
		compatible = "fixed-clock";
		#clock-cells = <0>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		device_type = "soc";
		ranges;

		uart: uart@18020000 {
			compatible = "qca,ar9330-uart";
			reg = <0x18020000 0x14>;
			clocks = <&ref>;
			clock-names = "uart";
			status = "disabled";
		};

		gpio: gpio@18040000 {
			compatible = "qca,ar7100-gpio";
			gpio-controller;
			reg = <0x18040000 0x100>;
			#gpio-cells = <2>;

			ngpios = <30>;
			status = "disabled";
		};

		pll: pll-controller@18050000 {
			compatible = "qca,ar9330-pll";
			reg = <0x18050000 0x100>;

			clocks = <&ref>;
			clock-names = "ref";

			#clock-cells = <1>;
		};

		spi: spi@1f000000 {
			compatible = "qca,ar7100-spi";
			reg = <0x1f000000 0x01000000>;

			clocks = <&pll ATH79_CLK_AHB>;
			clock-names = "ahb";

			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";
		};
	};
};