/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx51.dtsi"
/ {
model = "Freescale i.MX51 Babbage Board";
compatible = "fsl,imx51-babbage", "fsl,imx51";
chosen {
linux,stdout-path = "/soc/aips@70000000/serial@73fbc000";
environment@0 {
compatible = "barebox,environment";
device-path = &esdhc1, "partname:barebox-environment";
};
};
memory {
reg = <0x90000000 0x20000000>;
};
display@di0 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp1>;
display-timings {
native-mode = <&timing0>;
timing0: dvi {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
display@di1 {
compatible = "fsl,imx-parallel-display";
crtcs = <&ipu 1>;
interface-pix-fmt = "rgb565";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu_disp2>;
status = "disabled";
display-timings {
native-mode = <&timing1>;
timing1: claawvga {
clock-frequency = <27000000>;
hactive = <800>;
vactive = <480>;
hback-porch = <40>;
hfront-porch = <60>;
vback-porch = <10>;
vfront-porch = <10>;
hsync-len = <20>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
gpio-keys {
compatible = "gpio-keys";
power {
label = "Power Button";
gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
};
};
sound {
compatible = "fsl,imx51-babbage-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx51-babbage-sgtl5000";
ssi-controller = <&ssi2>;
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <2>;
mux-ext-port = <3>;
};
clocks {
ckih1 {
clock-frequency = <22579200>;
};
clk_26M: codec_clock {
compatible = "fixed-clock";
reg=<0>;
#clock-cells = <0>;
clock-frequency = <26000000>;
gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
};
};
};
&esdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
fsl,cd-controller;
fsl,wp-controller;
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "barebox-environment";
reg = <0x80000 0x20000>;
};
};
&esdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2>;
cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
fsl,uart-has-rtscts;
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
<&gpio4 25 GPIO_ACTIVE_LOW>;
status = "okay";
pmic: mc13892@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mc13892";
spi-max-frequency = <6000000>;
spi-cs-high;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
regulators {
sw1_reg: sw1 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1375000>;
regulator-boot-on;
regulator-always-on;
};
sw2_reg: sw2 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw3_reg: sw3 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-boot-on;
regulator-always-on;
};
vpll_reg: vpll {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
vdig_reg: vdig {
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <1650000>;
regulator-boot-on;
};
vsd_reg: vsd {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3150000>;
};
vusb2_reg: vusb2 {
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <2775000>;
regulator-boot-on;
regulator-always-on;
};
vvideo_reg: vvideo {
regulator-min-microvolt = <2775000>;
regulator-max-microvolt = <2775000>;
};
vaudio_reg: vaudio {
regulator-min-microvolt = <2300000>;
regulator-max-microvolt = <3000000>;
};
vcam_reg: vcam {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3000000>;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3150000>;
regulator-always-on;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-always-on;
};
};
};
flash: at45db321d@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
spi-max-frequency = <25000000>;
reg = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "Kernel";
reg = <0x40000 0x3c0000>;
};
};
};
&ssi2 {
fsl,mode = "i2s-slave";
status = "okay";
};
&iim {
barebox,provide-mac-address = <&fec 1 9>;
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx51-babbage {
pinctrl_hog: hoggrp {
fsl,pins = <
MX51_PAD_GPIO1_0__SD1_CD 0x20d5
MX51_PAD_GPIO1_1__SD1_WP 0x20d5
MX51_PAD_GPIO1_5__GPIO1_5 0x100
MX51_PAD_GPIO1_6__GPIO1_6 0x100
MX51_PAD_EIM_A27__GPIO2_21 0x5
MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
>;
};
pinctrl_audmux: audmuxgrp {
fsl,pins = <MX51_AUDMUX_PINGRP1>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <MX51_ECSPI1_PINGRP1>;
};
pinctrl_esdhc1: esdhc1grp {
fsl,pins = <MX51_ESDHC1_PINGRP1>;
};
pinctrl_esdhc2: esdhc2grp {
fsl,pins = <MX51_ESDHC2_PINGRP1>;
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX51_FEC_PINGRP1
MX51_PAD_EIM_A20__GPIO2_14 0x85 /* Reset */
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <MX51_I2C2_PINGRP1>;
};
pinctrl_ipu_disp1: ipudisp1grp {
fsl,pins = <MX51_IPU_DISP1_PINGRP1>;
};
pinctrl_ipu_disp2: ipudisp2grp {
fsl,pins = <MX51_IPU_DISP2_PINGRP1>;
};
pinctrl_kpp: kppgrp {
fsl,pins = <MX51_KPP_PINGRP1>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <MX51_UART1_PINGRP1>;
};
pinctrl_uart1_rtscts: uart1rtsctsgrp {
fsl,pins = <MX51_UART1_RTSCTS_PINGRP1>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <MX51_UART2_PINGRP1>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <MX51_UART3_PINGRP1>;
};
pinctrl_uart3_rtscts: uart3rtsctsgrp {
fsl,pins = <MX51_UART3_RTSCTS_PINGRP1>;
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_rtscts>;
fsl,uart-has-rtscts;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clk_26M>;
VDDA-supply = <&vdig_reg>;
VDDIO-supply = <&vvideo_reg>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "mii";
phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
status = "okay";
};
&kpp {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_kpp>;
linux,keymap = <0x00000067 /* KEY_UP */
0x0001006c /* KEY_DOWN */
0x00020072 /* KEY_VOLUMEDOWN */
0x00030066 /* KEY_HOME */
0x0100006a /* KEY_RIGHT */
0x01010069 /* KEY_LEFT */
0x0102001c /* KEY_ENTER */
0x01030073 /* KEY_VOLUMEUP */
0x02000040 /* KEY_F6 */
0x02010042 /* KEY_F8 */
0x02020043 /* KEY_F9 */
0x02030044 /* KEY_F10 */
0x0300003b /* KEY_F1 */
0x0301003c /* KEY_F2 */
0x0302003d /* KEY_F3 */
0x03030074>; /* KEY_POWER */
status = "okay";
};
