net: designware: eqos: don't funnel all MDIO writes to register 0
eqos_mdio_write ended up using the addr parameter instead of the computed miiaddr variable, which would've factored in the reg parameter. This had the effect that all writes went to PHY register 0, which was fine as long as there were only register 0 writes. As soon there are more writes, e.g. because a PHY driver was enabled, register 0 became clobbered and erratic behavior ensued. Fix the typo and while at it rename the val parameter to a more descriptive name. Fixes: a4f709bbb ("net: add Designware Ethernet QoS for STM32MP") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> |
---|
|
drivers/net/designware_eqos.c |
---|