crypto: caam - handle core endianness != caam endianness
Pick commit 261ea05 from Linux
upstream.

    crypto: caam - handle core endianness != caam endianness

    There are SoCs like LS1043A where CAAM endianness (BE) does not match
    the default endianness of the core (LE).
    Moreover, there are requirements for the driver to handle cases like
    CPU_BIG_ENDIAN=y on ARM-based SoCs.
    This requires for a complete rewrite of the I/O accessors.

    PPC-specific accessors - {in,out}_{le,be}XX - are replaced with
    generic ones - io{read,write}[be]XX.

    Endianness is detected dynamically (at runtime) to allow for
    multiplatform kernels, for e.g. running the same kernel image
    on LS1043A (BE CAAM) and LS2080A (LE CAAM) armv8-based SoCs.

    While here: debugfs entries need to take into consideration the
    endianness of the core when displaying data. Add the necessary
    glue code so the entries remain the same, but they are properly
    read, regardless of the core and/or SEC endianness.

    Note: pdb.h fixes only what is currently being used (IPsec).

    Reviewed-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
    Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
    Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
    Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

As part of this patch rd_reg[8,16,32,64]() and wr_reg[8,16,32,64]()
helper functions are introduced. All readl() calls are replaced by
rd_reg32() and all writel() calls are replaced by wr_reg32().

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
1 parent 6907e24 commit f2466b826553aacf6eedd793c224ce54365e8ecb
@Marcin Niestroj Marcin Niestroj authored on 3 Sep 2018
Sascha Hauer committed on 4 Sep 2018
Showing 5 changed files
View
drivers/crypto/caam/ctrl.c
View
drivers/crypto/caam/desc.h
View
drivers/crypto/caam/desc_constr.h
View
drivers/crypto/caam/jr.c
View
drivers/crypto/caam/regs.h