ARM: socfpga: achilles: convert to PBL barebox
...
Previously the FPGA was configured externally on the Achilles. On newer versions
this is changed and barebox has to configure the FPGA before the SDRAM can be
used.
If the FPGA is configured via JTAG or from an external memory, the *-bringup
version can be used.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Steffen Trumtrar
authored
on 31 Jul 2018
Sascha Hauer
committed
on 8 Aug 2018
