arm: bootm: don't fall over if image is padded with less than 40 bytes ...

If the zImage has a padding, which is less than 40 bytes
(sizeof struct fdt_header) the amount of read bytes would be propagated
as an error code. Fix this by only propagating real errors and treating
failure to read less than the expected amount as no concatenated DT
being present.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx'

ARM: socfpga: dts: sockit: remove upstreamed nodes ...

Remove devicetree entries that are already in the upstream devicetree.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: vexpress: add fixup handler for 'virtio, mmio' devices ...

Qemu adds 'virtio,mmio' nodes to the device tree. Before passing it to the
bootloader or the Linux kernel. This fixup handler copies these nodes to
the new device tree.

Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

vexpress: add bootstate node to the device tree ...

Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

vexpress: use device tree provided by QEMU if available ...

Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: vexpress: regenerate config ...

Enable some more features, so the default configuration gets more
in line with other platforms.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: vexpress: switch to DT probe and multi-image build ...

This switches the VExpress support to use an internal DT, instead
of probing the peripherals from a board file. It also switches to
a multi-iamge build with both CA9 and CA15 variants of the VExpress
board being supported.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: versatile: add basic clocks ...

This adds the necessary basic clocks used on the ARM versatile
platforms.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add i.MX6ull evk support ...

The i.MX6ull-EVK is a evaluation board for the i.MX6ull from NXP.
The upstream DTS is used, support should be fairly complete:

- 2x fec ethernet
- 1x USB Host
- 1x USB OTG
- 2x SD

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6ul: Add SoC specific lowlevel_init function ...

On i.MX6ul(l) (Cortex A7) We have to set the SMP bit before
enabling the caches, otherwise they won't work. Add a SoC specific
lowlevel_init function to be called by the i.MX6ul(l) boards.

Since this is a quirk of the Cortex A7 core we put the functionality
into a separate function to be reused by other Cortex A7 cores.

Change existing i.MX6ul(l) boards to use the new initialisation
function. It seems this is only needed when booting from USB,
in other boot modes the ROM will already have done the initialisation.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: vexpress: always build relocatable image ...

This allows to make more space available for the malloc area and
allows us to drop the special CA9 defconfig, which had a different
text base.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: rename flush_icache to icache_invalidate ...

flush_icache is a misnomer since the icache is invalidated, not
flushed. Rename the function accordingly.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: cache-armv7: Use designated instructions for isb/dsb/dmb ...

armv7 has designated instructions for the barrier operations,
so use these rather than cp15 operations.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX53 QSB: drop phy reset handling in board file ...

Since commit

	5c1846b62524 ("ARM: i.mx53: Parse Reset GPIO pin in FEC driver from Devicetree")

the fec driver ensures a phy reset. As there is little use in resetting
twice, drop the reset from the board file.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/omap'

Merge branch 'for-next/mvebu'

Merge branch 'for-next/misc'

Merge branch 'for-next/imx'

asm-generic: partially sync io.h with linux kernel ...

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

at91: sync mach/barebox-arm-head.h ...

From 308f9f6 Mon Sep 17 00:00:00 2001
From: Sam Ravnborg <sam@ravnborg.org>
Date: Fri, 7 Jul 2017 17:53:59 +0200
Subject: [PATCH 1/2] at91: sync mach/barebox-arm-head.h

To prepare for multi image support synch the barebox-arm-head.h
header with the arm version.
This include the reservation of a small area for board specific use

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: configs: AM335x: Enable mmc-extcsd command ...

This tool is for setting up eMMC devices.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: dts: am335x: Add phycore emmc device tree ...

Add a new device tree for phyCORE SOMs with EMMC enabled and NAND
disabled.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: dts: Enable NAND in DTS instead of DTSI ...

Starting with PCM-062, NAND isn't the main non-volatile memory for the
AM335x. Because that, NAND has be disabled in the SOM dtsi file and will
be enabled in a specific NAND SOM file.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: dts: am335x: Add emmc node to phycore-som ...

Add the EMMC node to the phycore-som device tree. It's by default
disabled, because NAND is the primary boot device.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

atmel_lcdfb: define power_control gpio in platform_data ...

Simplify board specific code by specifying the power_control
gpio direct in platform data.
Move registration of the GPIO to the driver so we no longer
need to duplicate this for each board.

As an intended side-effect there is no longer
any references to platform_data outside atmel_lcdc_register()
so remove it from struct atmel_lcdfb_info

The implementation assumes that GPIO=0 is the same as no power control.
This prevents us from using any GPIO=0 for power control,
but this is not considered a problem for current users.
Future DT users will not have this limitation.

This commit include a fix so we will actually power
down if requested. Previously this was hardcoded to ON.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phycore-imx6ul: use MAC address from OCOTP ...

The Phycore MX6UL modules are correctly fused with a MAC address.
Use this for the Barebox network connection and fixing up the kernel
DT.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mvebu: armada-xp: configure PLL and PHY register ...

The PLL setup is needed to use the USB ports in Linux.

This code is ported from mainline U-Boot arch/arm/mach-mvebu/cpu.c.

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

ARM: imx: phyCORE i.MX7: use register defines in dcd table ...

This was done using scripts/regsubst.pl.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

ARM: imx7: sabreSD: remove duplicate DT nodes ...

The latest upstream DTs have been merged, so remove the now duplicate
DT nodes.

Fixes: a0a5a7b84ff8 (ARM: i.MX: Add support for NXP i.MX7 SABRESD board)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>