Merge branch 'for-next/imx'

mtd: gpmi-nand: Make sure clock is disabled during rate change ...

On i.MX6 GPMI Nand controller the clock must be disabled during
a rate change. Otherwise glitches on the clock line may occur
which result in errors like:

MXS NAND: Error sending command
MXS NAND: DMA read error

There were previous attempts to fix this. One is in:

54961378f0 imx6: clk: Gate off ENFC clock before setting clock rate

This patch added a clk_disable() right before the rate change. Since
a clk_disable() on a disabled clk is a no-op, the patch added a
clk_enable() to the i.MX6 clk driver in the hope that the clk is
enabled in the nand driver probe and the clk_disable() really takes
place.

This patch doesn't work. First of all it enabled the enfc_podf clk
which was not the one that was actually disabled in the nand driver,
resulting in the nand drivers call to clk_disable() still being a
no-op. Then this patch also only works only on the classic i.MX6 which
was the only one supported at that time, but not on the i.MX6UL, i.MX6SX
and i.MX6SL which have a separate clk driver.

Instead of adding more quirks to the other i.MX6 clk drivers, fix this
in the GPMI driver. We no longer call clk_disable() on a disabled clk,
but instead do a clk_enable() first which makes sure the hardware state
is synchronized to the usage count and the following clk_disable()
is really effective. At the same time we can (and actually must) remove
the quirk in the i.MX6 clk driver.

Also add clk_disable()/clk_enable() around another rate change in the
GPMI driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: imx: remove unused clk_gate2_inverted ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

dts: update to v4.18-rc1 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx'

clock: Add i.MX8MQ clock driver ...

This is based on Lucas' patch sent as "[PATCH v2 4/4] clk: imx: add
clock driver for i.MX8MQ CCM" to the mailing list.

It will likely need some rework before it is finally merged, so apply
the reworks here before merging into barebox.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[andrew.smirnov@gmail.com: Fix pll type for IMX8MQ_VIDEO2_PLL1]
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: support pinmux configuration in clock provider nodes ...

Some device trees use pinctrl-* settings inside device tree nodes for
clock providers.

Barebox does not threat clock providers (such as fixed-clock or
gpio-gate-clock) as conventional devices, thus setting default
pinctrl configuration in driver binding code does not happen for
clock providers.

This patch adds setting default pinctrl configuration to of_clk_init(),
just before calling clock provider's probe routine.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: add clk-gpio driver ...

This implements support for gpio-gate-clock device tree nodes, that
define clocks that can be enabled or disabled via GPIO line.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX6: Fix enfc_sel for i.MX6dqp ...

The plus SoC variants have some differences in the clock controller.
For now fix the NAND controller clock. There are more differences
that might be relevant, but for now are left for a future excercise.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX6: Adjust GPMI parent clock ...

Based on the corresponding Kernel code:

The gpmi needs 100MHz frequency in the EDO/Sync mode, We can not get the
100MHz from the pll2_pfd0_352m. So choose pll2_pfd2_396m as enfc_sel's
parent.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX7: Port NAND clock setup code from Linux ...

Port Linux kernel commit 22039d150f716e4e ("clk: imx7d: create clocks
behind rawnand clock gate") in order to correctly initialize clocks
necessary for APBH DMA block to be functional on i.MX7

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx25: clk: add rngb clock ...

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>

clk: sp810: hardwire parent to 1MHz clock ...

This works around a limitation in our handling of the vexpress
config bus. For now just hardcode the clock parent to the 1MHz
clock, which is the default as emulated by QEMU and also the
setting the Linux kernel will configure later.

This fixes the vexpress clocksource running at a wrong rate
leading to bogus delays and sleep times.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/misc'

Merge branch 'for-next/mips'

clk: versatile: add basic clocks ...

This adds the necessary basic clocks used on the ARM versatile
platforms.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: add ar9344 clock driver ...

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

remove checks for xzalloc() returning NULL ...

xzalloc() either returns memory or panics, so checking for NULL is useless.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: imx: cpu: don't store the address of a function parameter ...

The function imx_clk_cpu takes a const char *parent_name as second
paramter. The implementation introduced in commit 9a89ed9d281e then
uses the address of this function parameter to assign clk.parent_names.
This is an address on the stack that is saved in the clk tree and of
course this is easily overwritten by later execution paths of barebox.

Without this fix the clk_dump command reproducibly crashes on i.MX7
(which is the only SoC that makes use of imx_clk_cpu()).

Fixes: 9a89ed9d281e ("clk: imx: Add clk-cpu support")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Merge branch 'for-next/misc'

Merge branch 'for-next/imx'

Merge branch 'for-next/at91'

clk: i.MX7: Remove unused UART clocks array ...

Remove what looks like unused leftover from analogous Linux kernel
code.

Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

clk: clk-fixed-factor: remove leftover debugging ...

Don't spam the output with rate propagation messages. It isn't done
for any other clock.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

clk: at91: fix clk-main ...

Following warning was reported during boot with
at91sam9263ek with DT enabled.

    "Main crystal frequency not set, using approximate value"

This occured due to a missing parent in clk_rm9200_main.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

i.MX: clk-pllv3: Initially disable PLL_BYPASS bit ...

Commit cbff8031b491 ("i.MX: clk-pllv3: Do not touch PLL_BYPASS bit")
overreached a bit by removing the code that disables the PLL_BYPASS bit
for all architectures instead of making an exception for Vybrid and
i.MX6SL. This causes the USB controller on i.MX6Q to run at bypass
frequency and fail:

    barebox@Boundary Devices i.MX6 Quad Nitrogen6x Board:/ usb
    usb: USB: scanning bus for devices...
    usb: Bus 001 Device 001: ID 0000:0000 EHCI Host Controller
    imx-usb 2184200.usb: port(0) reset error

This patch adds code to unconditionally disable the PLL_BYPASS bit
initially, when the PLL clocks are registered.

Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Fixes: cbff8031b491 ("i.MX: clk-pllv3: Do not touch PLL_BYPASS bit")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

clk: fix clk_get error handling ...

If there is no OFTREE support of_clk_get_by_name failed with
-ENOENT, which caused clk_get to bail out.
This had the effect that nothing was printed on the serial console
with at91sam9263-ek.

There are no error paths that will return -ENODEV as we test for today,
so change this to -ENOENT which is in use.
This allows us to contine with clk_get_sys() in case of other
errors as was the intention of the original fix.

Fixes: 90f7eacb ("clk: let clk_get return errors from of_clk_get_by_name")
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Merge branch 'for-next/mvebu'

Merge branch 'for-next/clk'

i.MX: clk: Remove imx_clk_pllv3_locked() ...

Remove imx_clk_pllv3_locked() which was introduced for the sake of
Vybrid platform. The same effect (waiting on 'locked' bit) can be
achived with vanilla clk_pllv3_enable/disable, which make said
function unnecessary.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>