ARM: socfpga: achilles: convert to PBL barebox ...

Previously the FPGA was configured externally on the Achilles. On newer versions
this is changed and barebox has to configure the FPGA before the SDRAM can be
used.

If the FPGA is configured via JTAG or from an external memory, the *-bringup
version can be used.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: Arria10: support programming FPGA in PBL ...

Some Arria10 boards don't have the FPGA programmed externally.
Instead barebox needs to do that. As the Arria10 has the SDRAM
controller in the FPGA, the first thing we need to do is,
configure the FPGA before the SDRAM can even be used.

It works like this:
  1. boot ROM fetches the PBL from MMC
  2. read the MBR from MMC (this depends on the setup done by the boot ROM)
  3. read the Bitstream from the MMC and program the FPGA
  4. re-read the barebox image from MMC, this time with the full barebox
     that is appended to the PBL
  5. jump into the full barebox

Only supported boot device is eMMC.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx8mq'

ARM: i.MX: Add support for ZII RDU1 board ...

ZII RDU1 is a i.MX51 based, Babbagde board derivative supported by
upstream kernel. This commit add support for it to Barebox.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8: Add i.MX8mq EVK support ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx'

ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo with 1GiB RAM ...

Add Phytec phyCORE-i.MX6 Solo:
  - imx6dl-phytec-phycore-som-nand:
    - 1GiB RAM on 1 Bank with 32Bit
    - 100Mbit Ethernet
    - NAND
    - SD
    - UART

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>

ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 QuadPlus with 1GiB RAM ...

Add Phytec phyCORE-i.MX6 QuadPlus:
 - imx6qp-phytec-phycore-som-nand:
   - 1GiB RAM on 2 Banks with 64Bit
   - 1000Mbit Ethernet
   - NAND
   - SD
   - UART

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>

gitignore: Add *.pblx files ...

Looks like *.pblx was accidentally dropped from ignored files list and
now my "git status" is clobbered by every *.pblx image that is being
built (that's quite a lot for imx_v7_defconfig). Re-add original rule
to prevent that.

Fixes eed8a41c5 ("gitignore: ignore pblx.simximg files")

Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add Advantech imx6 board support ...

Add support for Advantech i.MX6 SOM named ROM-7421.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX53 TX53: remove duplicate _imx53 ...

The pblx-y variables for the TX53 have _imx53 twice in their names. With
this the names do not match the names in the FILE_* variables. This
results in the make system removing the pblx files as intermediate
files. Fix the names.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX53/TX53: add new samsung based xx30 variant ...

Karo is deploying their latest tx53 modules with samsung instead of
nanya ram. Unfortunatly the still keep the old revision for that
modules. We add this modules as an extra xx30 samsung variant.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX53/TX53: rework to dts based boot ...

Since nobody likes to use platformcode based machines any more, we also
switch this one to use dts based booting.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

boards: samx6: add initial support for kontron samx6i ...

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

gitignore: ignore pblx.simximg files ...

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>

at91sam9263ek: enable DT support ...

Add at91sam9263ek.dts to build.
Include mmc1 in at91sam9263ek.dts, as mmc1 is what the evaluation
kit uses for the SD card.

Add DT specific of_init
Adjust build to drop non-DT files from mach-at91

RomBOOT
>AT91Bootstrap 3.0.1
patch-0.8 64MB Ram
Load from SD-Card
Loading from SD-Card
Open: u-boot.bin
Loading from SD-Card - Success

barebox 2017.12.0-00036-gda46de29e #23 Sun Dec 31 09:15:39 CET 2017

Board: Atmel at91sam9263ek
gpio-at91 fffff200.gpio: AT91 gpio driver registered
gpio-at91 fffff400.gpio: AT91 gpio driver registered
gpio-at91 fffff600.gpio: AT91 gpio driver registered
gpio-at91 fffff800.gpio: AT91 gpio driver registered
gpio-at91 fffffa00.gpio: AT91 gpio driver registered
pinctrl-at91 pinctrl.2: AT91 pinctrl registered
AT91: Detected soc type: at91sam9263
AT91: Detected soc subtype: Unknown
mdio_bus: miibus0: probed
macb fffbc000.ethernet: Cadence MACB at 0xfffbc000
at91_udc fff78000.gadget: at91_udc version 3 May 2006
atmel_mci fff80000.mmc: version: 0x210
atmel_mci fff80000.mmc: registered as fff80000.mmc
atmel_mci fff84000.mmc: version: 0x210
atmel_mci fff84000.mmc: registered as fff84000.mmc
malloc space: 0x239fab00 -> 0x23dfaaff (size 4 MiB)
barebox-environment environment.6: probe failed: No such device
environment load /dev/env0: No such file or directory
Maybe you have to create the partition.
running /env/bin/init...
\e[?25h
Hit any key to stop autoboot:    3
barebox@Atmel at91sam9263ek:/ iomem
0x00000000 - 0xffffffff (size 0x00000000) iomem
  0x00300000 - 0x00313fff (size 0x00014000) 300000.sram
  0x00500000 - 0x00503fff (size 0x00004000) 500000.sram
  0x00700000 - 0x00700fff (size 0x00001000) 700000.fb
  0x20000000 - 0x23ffffff (size 0x04000000) ram0
    0x239fab00 - 0x23dfaaff (size 0x00400000) malloc space
    0x23dfab00 - 0x23dfffe2 (size 0x000054e3) board data
    0x23e00000 - 0x23e53cc8 (size 0x00053cc9) barebox
    0x23e53cc9 - 0x23e6404f (size 0x00010387) barebox data
    0x23e64050 - 0x23e6754b (size 0x000034fc) bss
    0x23fe4000 - 0x23fe7fff (size 0x00004000) ttb
    0x23fe8000 - 0x23feffff (size 0x00008000) stack
  0xfff78000 - 0xfff7bfff (size 0x00004000) fff78000.gadget
  0xfff80000 - 0xfff805ff (size 0x00000600) fff80000.mmc
  0xfff84000 - 0xfff845ff (size 0x00000600) fff84000.mmc
  0xfff8c000 - 0xfff8c1ff (size 0x00000200) fff8c000.serial
  0xfffbc000 - 0xfffbc0ff (size 0x00000100) fffbc000.ethernet
  0xffffee00 - 0xffffefff (size 0x00000200) ffffee00.serial
  0xfffff200 - 0xfffff3ff (size 0x00000200) fffff200.gpio
  0xfffff400 - 0xfffff5ff (size 0x00000200) fffff400.gpio
  0xfffff600 - 0xfffff7ff (size 0x00000200) fffff600.gpio
  0xfffff800 - 0xfffff9ff (size 0x00000200) fffff800.gpio
  0xfffffa00 - 0xfffffbff (size 0x00000200) fffffa00.gpio
  0xfffffd30 - 0xfffffd3e (size 0x0000000f) fffffd30.timer
barebox@Atmel at91sam9263ek:/ devinfo
`-- global
`-- nv
`-- platform
   `-- mem0
      `-- 0x00000000-0x03ffffff (    64 MiB): /dev/ram0
   `-- 300000.sram
      `-- 0x00000000-0x00013fff (    80 KiB): /dev/sram0
   `-- 500000.sram
      `-- 0x00000000-0x00003fff (    16 KiB): /dev/sram1
   `-- ahb.0
      `-- apb.1
         `-- fffff000.interrupt-controller
         `-- fffffc00.pmc
         `-- ffffe200.ramc
         `-- ffffe400.smc
         `-- ffffe800.ramc
         `-- ffffea00.smc
         `-- ffffec00.matrix
         `-- fffffd30.timer
         `-- fff7c000.timer
         `-- fffffd00.rstc
         `-- fffffd10.shdwc
         `-- pinctrl.2
            `-- fffff200.gpio
            `-- fffff400.gpio
            `-- fffff600.gpio
            `-- fffff800.gpio
            `-- fffffa00.gpio
         `-- ffffee00.serial
            `-- cs0
               `-- 0x00000000-0xffffffffffffffff (   0 Bytes): /dev/cs0
         `-- fff8c000.serial
            `-- cs1
               `-- 0x00000000-0xffffffffffffffff (   0 Bytes): /dev/cs1
         `-- fffbc000.ethernet
            `-- miibus0
            `-- eth0
         `-- fff78000.gadget
            `-- usbgadget
         `-- fff80000.mmc
            `-- mci0
         `-- fff84000.mmc
            `-- mci1
         `-- fffffd40.watchdog
         `-- fffa4000.spi
         `-- fffac000.can
      `-- 700000.fb
      `-- a00000.ohci
      `-- 10000000.ebi
   `-- i2c-gpio-0.3
   `-- leds.4
   `-- gpio_keys.5
   `-- cs2
      `-- 0x00000000-0xffffffffffffffff (   0 Bytes): /dev/cs2
   `-- soc
   `-- mem1
      `-- 0x00000000-0xfffffffe (     4 GiB): /dev/mem
   `-- environment.6
`-- mdio_bus
`-- fs
   `-- ramfs0
   `-- devfs0
`-- net
`-- udc0
`-- fb0
   `-- 0x00000000-0x000257ff (   150 KiB): /dev/fb0
barebox@Atmel at91sam9263ek:/ drvinfo
Driver  Device(s)
--------------------
syscon
at91-pit
        fffffd30.timer
gpio-at91
        fffff200.gpio
        fffff400.gpio
        fffff600.gpio
        fffff800.gpio
        fffffa00.gpio
pinctrl-at91
        pinctrl.2
atmel_usart
        ffffee00.serial
        fff8c000.serial
ramfs
        ramfs0
devfs
        devfs0
fat
tftp
at91sam9-smc
Generic PHY
macb
        fffbc000.ethernet
atmel_nand
cfi_flash
at91_udc
        fff78000.gadget
atmel_mci
        fff80000.mmc
        fff84000.mmc
atmel_lcdfb
        700000.fb
gpio-leds
        leds.4
gpio_keys
        gpio_keys.5
mmio-sram
        300000.sram
        500000.sram
mem
        mem0
        mem1
barebox-environment

Use 'devinfo DEVICE' for more information
barebox@Atmel at91sam9263ek:/ gpioinfo

GPIOs 0-31, chip fffff200.gpio:
             dir val requested  label
  GPIO    0: unk  hi        false
  GPIO    1: unk  hi        false
  GPIO    2:  in  hi        false
  GPIO    3: unk  hi        false
  GPIO    4: unk  hi        false
  GPIO    5: unk  hi        false
  GPIO    6: unk  lo        false
  GPIO    7: unk  hi        false
  GPIO    8: unk  hi        false
  GPIO    9: unk  hi        false
  GPIO   10: unk  hi        false
  GPIO   11: unk  hi        false
  GPIO   12: unk  hi        false
  GPIO   13:  in  hi        false
  GPIO   14:  in  hi        false
  GPIO   15:  in  hi        false
  GPIO   16:  in  hi        false
  GPIO   17:  in  hi        false
  GPIO   18:  in  hi        false
  GPIO   19:  in  lo        false
  GPIO   20:  in  hi        false
  GPIO   21:  in  hi        false
  GPIO   22:  in  hi        false
  GPIO   23:  in  hi        false
  GPIO   24:  in  hi        false
  GPIO   25:  in  lo         true  udc_vbus
  GPIO   26: unk  hi        false
  GPIO   27: unk  hi        false
  GPIO   28: unk  hi        false
  GPIO   29: unk  hi        false
  GPIO   30:  in  lo        false
  GPIO   31:  in  hi        false

GPIOs 32-63, chip fffff400.gpio:
             dir val requested  label
  GPIO   32:  in  hi        false
  GPIO   33:  in  hi        false
  GPIO   34:  in  hi        false
  GPIO   35:  in  hi        false
  GPIO   36:  in  hi        false
  GPIO   37:  in  hi        false
  GPIO   38:  in  hi        false
  GPIO   39: out  hi         true  d3
  GPIO   40:  in  hi        false
  GPIO   41: unk  hi        false
  GPIO   42:  in  hi        false
  GPIO   43:  in  hi        false
  GPIO   44:  in  hi        false
  GPIO   45:  in  hi        false
  GPIO   46:  in  hi        false
  GPIO   47:  in  hi        false
  GPIO   48:  in  hi        false
  GPIO   49:  in  hi        false
  GPIO   50:  in  hi        false
  GPIO   51:  in  hi        false
  GPIO   52:  in  hi        false
  GPIO   53:  in  hi        false
  GPIO   54:  in  hi        false
  GPIO   55:  in  hi        false
  GPIO   56:  in  hi        false
  GPIO   57:  in  hi        false
  GPIO   58:  in  hi        false
  GPIO   59: out  lo   active low  PHY 50 MHz oscillator
  GPIO   60:  in  hi        false
  GPIO   61:  in  hi        false
  GPIO   62:  in  hi        false
  GPIO   63:  in  hi        false

GPIOs 64-95, chip fffff600.gpio:
             dir val requested  label
  GPIO   64:  in  hi        false
  GPIO   65: unk  hi        false
  GPIO   66: unk  hi        false
  GPIO   67: unk  hi        false
  GPIO   68:  in  hi         true  gpio_keys
  GPIO   69:  in  hi         true  gpio_keys
  GPIO   70: unk  lo        false
  GPIO   71: unk  lo        false
  GPIO   72: unk  lo        false
  GPIO   73: unk  lo        false
  GPIO   74: unk  lo        false
  GPIO   75: unk  lo        false
  GPIO   76: unk  lo        false
  GPIO   77:  in  hi        false
  GPIO   78: unk  lo        false
  GPIO   79: unk  lo        false
  GPIO   80: unk  lo        false
  GPIO   81: unk  lo        false
  GPIO   82: unk  lo        false
  GPIO   83: unk  lo        false
  GPIO   84:  in  hi        false
  GPIO   85:  in  hi        false
  GPIO   86: unk  lo        false
  GPIO   87: unk  lo        false
  GPIO   88: unk  lo        false
  GPIO   89: unk  lo        false
  GPIO   90: unk  lo        false
  GPIO   91: unk  lo        false
  GPIO   92:  in  hi        false
  GPIO   93:  in  hi         true  d2
  GPIO   94: unk  hi        false
  GPIO   95: unk  hi        false

GPIOs 96-127, chip fffff800.gpio:
             dir val requested  label
  GPIO   96:  in  hi        false
  GPIO   97:  in  hi        false
  GPIO   98:  in  hi        false
  GPIO   99:  in  hi        false
  GPIO  100:  in  hi        false
  GPIO  101:  in  hi        false
  GPIO  102:  in  hi        false
  GPIO  103:  in  hi        false
  GPIO  104:  in  hi        false
  GPIO  105:  in  hi        false
  GPIO  106:  in  hi        false
  GPIO  107:  in  hi        false
  GPIO  108: unk  lo        false
  GPIO  109: unk  lo        false
  GPIO  110: unk  lo        false
  GPIO  111:  in  hi        false
  GPIO  112: unk  lo        false
  GPIO  113: unk  hi        false
  GPIO  114: unk  hi        false
  GPIO  115: unk  lo        false
  GPIO  116: unk  hi        false
  GPIO  117: unk  hi        false
  GPIO  118: unk  hi        false
  GPIO  119: unk  hi        false
  GPIO  120: unk  lo        false
  GPIO  121: unk  hi        false
  GPIO  122: unk  hi        false
  GPIO  123: unk  lo        false
  GPIO  124: unk  hi        false
  GPIO  125: unk  hi        false
  GPIO  126: unk  hi        false
  GPIO  127: unk  hi        false

GPIOs 128-159, chip fffffa00.gpio:
             dir val requested  label
  GPIO  128:  in  hi        false
  GPIO  129:  in  hi        false
  GPIO  130:  in  hi        false
  GPIO  131:  in  hi        false
  GPIO  132:  in  hi        false
  GPIO  133:  in  hi        false
  GPIO  134:  in  hi        false
  GPIO  135:  in  hi        false
  GPIO  136:  in  hi        false
  GPIO  137:  in  hi        false
  GPIO  138:  in  hi        false
  GPIO  139:  in  hi        false
  GPIO  140:  in  hi        false
  GPIO  141:  in  hi        false
  GPIO  142:  in  hi        false
  GPIO  143:  in  hi        false
  GPIO  144:  in  hi        false
  GPIO  145:  in  hi        false
  GPIO  146:  in  lo         true  mci_cd
  GPIO  147:  in  hi        false
  GPIO  148:  in  hi        false
  GPIO  149: unk  lo        false
  GPIO  150:  in  hi        false
  GPIO  151: unk  lo        false
  GPIO  152: unk  lo        false
  GPIO  153: unk  lo        false
  GPIO  154: unk  lo        false
  GPIO  155: unk  lo        false
  GPIO  156: unk  lo        false
  GPIO  157: unk  lo        false
  GPIO  158: unk  hi        false
  GPIO  159:  in  hi        false
barebox@Atmel at91sam9263ek:/ clk_dump
slow_xtal (rate 32768, enabled)
    prog0 (rate 32768, enabled)
        pck0 (rate 32768, disabled)
    prog1 (rate 32768, enabled)
        pck1 (rate 32768, disabled)
    prog2 (rate 32768, enabled)
        pck2 (rate 32768, disabled)
    prog3 (rate 32768, enabled)
        pck3 (rate 32768, disabled)
main_xtal (rate 16367660, enabled)
    main_osc (rate 16367660, enabled)
        mainck (rate 16367660, enabled)
            pllbck (rate 98205960, enabled)
                usbck (rate 49102980, enabled)
                    uhpck (rate 49102980, disabled)
                    udpck (rate 49102980, disabled)
            pllack (rate 204595750, enabled)
                masterck (rate 102297875, enabled)
                    pioA_clk (rate 102297875, enabled)
                    pioB_clk (rate 102297875, enabled)
                    pioCDE_clk (rate 102297875, enabled)
                    usart0_clk (rate 102297875, enabled)
                    usart1_clk (rate 102297875, disabled)
                    usart2_clk (rate 102297875, disabled)
                    mci0_clk (rate 102297875, disabled)
                    mci1_clk (rate 102297875, disabled)
                    can_clk (rate 102297875, disabled)
                    twi0_clk (rate 102297875, disabled)
                    spi0_clk (rate 102297875, disabled)
                    spi1_clk (rate 102297875, disabled)
                    ssc0_clk (rate 102297875, disabled)
                    ssc1_clk (rate 102297875, disabled)
                    ac97_clk (rate 102297875, disabled)
                    tcb_clk (rate 102297875, disabled)
                    pwm_clk (rate 102297875, disabled)
                    macb0_clk (rate 102297875, enabled)
                    g2de_clk (rate 102297875, disabled)
                    udc_clk (rate 102297875, disabled)
                    isi_clk (rate 102297875, disabled)
                    lcd_clk (rate 102297875, enabled)
                    dma_clk (rate 102297875, disabled)
                    ohci_clk (rate 102297875, disabled)
barebox@Atmel at91sam9263ek:/ led
registered LEDs:
0 : name: d3         max_value: 1
1 : name: d2         max_value: 1
barebox@Atmel at91sam9263ek:/ led 1 1
barebox@Atmel at91sam9263ek:/ led 0 1

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: boards: phytec-som-am335x: Revert unified MLO for 1GB ...

There is a problem in the data path between 1GB RAM devices and the
core, which leads to wrong read operations after DDR initialization
in soft resets. This needs more investigation, but until we didn't
found the problem, we will return to the origin MLO for 1GB RAM devices
with static RAM timings and without memory access.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: rdu2: build a single image for both Quad and QuadPlus variants ...

This allows for easier deployments on the different units, as there is no
need to flash different images to the Quad and QuadPlus units anymore.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: boards: phytec-som-am335x: Add unified MLO ...

PCM-060 modules only have one-bank RAMs populated, which allows us to
find out the populated RAM size at run-time.

Therefore, a new entry point was create 'PHYTEC_ENTRY_UNIFIED_MLO'. This
creates a MLO for all modules of one family and all existing PCM-060
MLOs were replaced with this new entry point. To provide backward
compatibility for older modules, these were not affected.

In the first step generic RAM timings for the module family get loaded,
because RAM accesses are only possible with an initialized controller.
After that, the RAM size will be calculated and the RAM controller gets
reinitialized with the correct RAM timings.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx'

ARM: vexpress: switch to DT probe and multi-image build ...

This switches the VExpress support to use an internal DT, instead
of probing the peripherals from a board file. It also switches to
a multi-iamge build with both CA9 and CA15 variants of the VExpress
board being supported.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add i.MX6ull evk support ...

The i.MX6ull-EVK is a evaluation board for the i.MX6ull from NXP.
The upstream DTS is used, support should be fairly complete:

- 2x fec ethernet
- 1x USB Host
- 1x USB OTG
- 2x SD

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: dts: am335x: Add phycore emmc device tree ...

Add a new device tree for phyCORE SOMs with EMMC enabled and NAND
disabled.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: dts: Enable NAND in DTS instead of DTSI ...

Starting with PCM-062, NAND isn't the main non-volatile memory for the
AM335x. Because that, NAND has be disabled in the SOM dtsi file and will
be enabled in a specific NAND SOM file.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Add support for NXP i.MX7 SABRESD board ...

Add minimal code to support NXP i.MX7 SABRESD board. Tested to have
working SD card and first Ethernet port as well as being able to boot
upstream Linux kernel (4.12+).

Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

ARM: imx: phyCORE i.MX7 on phyBOARD-Zeta support ...

This adds preliminary support for the phyCORE i.MX7 module on a
phyBOARD-Zeta baseboard. The DTs will likely change in the future
when PHYTEC finalizes their BSP.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

ARM: mvebu: Add initial support for Turris Omnia ...

Up to now only 2nd stage booting is tested and boots up to a prompt.
i2c and spi are working, ethernet, usb and sata don't.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx'

ARM: i.MX6: add Technexion Pico Hobbit support ...

This adds support for the i.MX6UL Technexion Pico Hobbit. The board
comes with different amounts of RAM. We create one image for the 256MB
and one for the 512MB variant.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
   ---
   v1 -> v2: - removed already prepared clock setup
   v2 -> v3: - added phy-reset-post-delay as the support is now available

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Makefile: Speed up evaluation of ld options ...

Since "333ff7b1e4 Fix linking with new ld, based on u-boot" the build
with multiple images became unreasonable slow. This is because the
ld-option macro was evaluated once for each image. Fix this by exporting
and using LDFLAGS_barebox from the main Makefile.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>