imx6ul-phytec-phycore-som: don't use fsl, no-blockmark-swap for the NAND ...

barebox doesn't honor that property which yields to inconsitencies
between Linux and barebox after for example filling an UBI with a file
system with barebox and then trying to mount that from Linux.

Note this is an interruptive change as it requires to rewrite the flash
to make it working with Linux again.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: fix setup_c when runtime offset is != 0 ...

The runtime offset has to be added to the memcpy source address and
substracted from the return address. This should have been changed in
a43e2bbc46 which changed from returning the negative runtime offset
into changing the positive runtime offset. Instead a43e2bbc46 only
changed a zero substraction ("subs r4, r0, #0") into a zero addition
("adds r4, r0, #0") which was used as a equal to zero test and changed
nothing. This part is reverted here.

Fixes wrong copy / return locations when setup_c is called with
different runtime and link addresses.

fixes: a43e2bbc46 ("ARM: return positive offset in get_runtime_offset()")

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/socfpga'

Merge branch 'for-next/missing-prototypes'

Merge branch 'for-next/misc'

Merge branch 'for-next/imx'

Merge branch 'for-next/checkpatch'

ARM: at91: add architecture dependecy to KSZ9477_EVB board ...

This board is part of the SAMA5D3 architecture.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx: select OFDEVICE for VF610 ...

It's a dependency for IMX_OCOTP, which is selected by VF610.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: Add full featured phyCORE-i.MX 6ULL ...

The phyCORE-i.MX 6ULL now comes in a full featured (Y2 variant) and a
low cost (Y0 variant) version. The main difference for the barebox is
the missing second USB OTG port on the Y0 variant and the RAM configuration.

So to account for these differences the existing low cost version is
renamed and the full featured version added.

The results are following phyCORE-i.MX 6ULL modules:

phyCORE-i.MX 6ULL low cost:
	- i.MX 6ULL Y0
	- 256 MB RAM
	- NAND
	- Ethernet 10/100 MBits
	- USB OTG

phyCORE-i.MX 6ULL full featured:
	- i.MX 6ULL Y2
	- 512 MB RAM
	- NAND
	- Ethernet 10/100 MBits
	- USB OTG
	- USB Host

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: phyCORE-i.MX 6UL/ULL: Enable USB OTG on port 1 ...

Enable USB OTG support on USB OTG port 1 of the phyCORE-i.MX 6UL/ULL.

Signed-off-by: Fabian Godehardt <fg@emlix.com>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: phyCORE-i.MX 6UL: Enable USB host port ...

The phyBOARD-Segin baseboard of the phyCORE-i.MX 6UL features a USB
type A connector on the second USB OTG port of the i.MX 6UL. So enable this
port as a host port.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

phytec-som-imx6: ksz8081_phy_fixup: Don't override B-CAST_OFF strap-in ...

As PHY address 0 is not used on PHYTEC i.MX 6 and i.MX 6UL SOMs we do
not have to override the B-CAST_OFF strap-in which disables broadcast
on PHY address 0.

Also add some comments about the magic values.

Signed-off-by: Jan Remmet <j.remmet@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM64: backtrace: fix missing prototypes ...

Include header for unwind_backtrace prototype and mark dump_backtrace_entry
as static.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: add prototype for mmu_early_disable ...

This is only provided by aarch64 for now and not actually used, but
raher than deleting this potentially useful chunk of code, just
provide the prototype to shut up the warning.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: interrupts64: add missing prototypes ...

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: ptrace: add mssing show_regs prototype in aarch64 path ...

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: nxp-imx8mq-evk: add missing prototype for nxp_imx8mq_evk_ddr_cfg_phy ...

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mmu64: include dma.h ...

dma.h provides the prototypes for the different dma_alloc_* functions,
so we should include it to make sure the prototypes are consistent.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: images: use piggydata ...

The way we assemble the multi images on ARM is rather complicated and
error prone. We currently cat the compressed barebox image behind the
PBL executable and need some magic to obtain the size of the payload and
also have to do tricks to reliably get a pointer to the compressed
image.

This patch switches over to compile the compressed payload into the PBL
image itself which has proven to work for the single PBL case and for
the ARM Linux Kernel aswell.

The goal is to unify the single PBL and the multi PBL cases together in
the future to get an easier startup path for ARM.

This patch has been tested on the i.MX53 QSB, i.MX53 Vincell, Beaglebone
black (both MLO and 2nd stage) and a Phytec phyFLEX i.MX6 board.

SoCFPGA Arria10 has also be changed slightly with this patch. We used to
generate a single image (barebox-socfpga-achilles.img) which was
used as xload image and full image. We now instead generate two images:
barebox-socfpga-achilles-xload.img and barebox-socfpga-achilles.img, the
former loaded by the ROM and the latter loaded by the xload image.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Add max_load_size option to boards that will need it ...

The max_load_size option makes sure that only the portion of the image
is loaded to SRAM that fits into it.

Note this does not cover the whole available SRAM area for all boards,
for the bigger SRAM areas only a part is chosen that is enough to fit
the initial loader in.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

kconfig: include common Kconfig files from top-level Kconfig ...

Based on this linux kernel commit:

> commit 1572497
> Author: Christoph Hellwig <hch@lst.de>
> Date:   Tue Jul 31 13:39:30 2018 +0200
>
>     kconfig: include common Kconfig files from top-level Kconfig

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: Add support for max_load_size option ...

When an image is loaded to SRAM we can normally only load a part of the
full image, limited by the available space in SRAM. We currently load
the pblb image which is the executable part of the PBL without the
compressed barebox payload. We are going to link the compressed barebox
image into the pbl image though, so we can't see the desired load size
from outside the image anymore.

This adds a max_load_size option to set this size explicitly.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: GuF Vincell: Make pbl smaller ...

The PBL unnecessarily contains two dtb files when only one is needed. Be
a bit more smart and compile in only one.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: GuF Vincell: Use DCD table to setup SDRAM ...

This patch removes the xload mechanism to configure SDRAM and instead
installs a DCD table. The DCD table has been generated from the FSL
DDR3 script aid Excel sheet (version 0.0.1). The calibration values
were taken from a calibration run with the barebox internal functions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

multiple/raspberry-pi: fix clkdevs for raspberry pi ...

Commit 7e497d4 introduced a name change which
breaks support for the fixed clkdev for uart and sdhci for RPI.
Use clkdev_add_physbase instead to be independant from the device tree names.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add Raspberry Pi Zero W Board ...

The Raspberry Pi Zero W is basically a Raspberry Pi 1 B+
but on a smaller PCB and with Bluetooth and WiFi.
See:
https://elinux.org/RPi_Hardware

This patch adds support for Raspberry Pi Zero W to barebox.

Signed-off-by: Chris Fiege <chris@tinyhost.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: boards: phytec-som-am335x: Fix mac overwrite from state ...

state_read_mac() returns 0 on success so mac never was overwritten.
Fix this and add check for valid mac address.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: generate smaller images when multiple boards are selected ...

The socfpga xload images are limited to 64KiB. This doesn't fit if
multiple boards are selected. The reason is that we include huge
C files and arrays in the early init code which get compiled once
for each board. -ffunction-sections is without effect here since all
functions have the same name and hence we get the same function
multiple times in the same section.

To overcome this we surround all function names with a SECT() macro which
is used to add a board specific prefix to the section names. This way
-ffunction-sections can now do its work and discard unused functions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: socfpga: update defconfig ...

Select some more common drivers in the defconfig.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>