hab/caam: Fix compilation of caam driver when hab is disabled ...

The caam driver needs the variable habv4_need_rng_software_self_test,
but this is only declared when HABV4 is enabled. Instead of exporting
a variable rather provide a function to test if a software selftest
of the random number generator is needed.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: socfpga: fix compiler warnings for Cyclone5 ...

When building for Cyclone5 SoCFPGA, the socfpga_a10_pll_init(),
socfpga_a10_perith_init() and socfpga_a10_gate_init() functions are
defined as dummy functions returning ERR_PTR(-ENOSYS).  They are defined
with external linkage.  With '-Wmissing-prototypes' GCC warns about
externally linked function definitions with no preceding prototype.
Define them as 'static inline' to avoid the compiler warnings.

(Note: Arria10 uses non-dummy versions of these functions declared
'extern' but defined elsewhere.)

Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/zynqmp'

Merge branch 'for-next/warnings'

Merge branch 'for-next/usb-storage'

Merge branch 'for-next/stm32'

Merge branch 'for-next/net'

Merge branch 'for-next/misc'

Merge branch 'for-next/layerscape'

treewide: surround Kconfig file paths with double quotes ...

Based on Linux commit 8636a1f

This will be needed when you sync Kconfig with Linux 5.0 or later.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

of: Fix reproducible names for #address-cells != 1 ...

For the new "fixed-partitions" binding we ignore the partitions
subnode for creating reproducible names and set node to its parent.
To get the number of address cells we must call of_n_addr_cells()
before setting node to its parent though, not afterwards. With the
current behaviour we always get OF_ROOT_NODE_ADDR_CELLS_DEFAULT (=1).
This happens to work then the partitioned device is less than 4GiB
in size. On bigger devices #address-cells = <2> is chosen by the
mtd partition fixup code.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reported-by: Bastian Krause <bst@pengutronix.de>

bus: mvebu-mbus: Add missing whitespace ...

orion5x_2win_mbus_data__maybe_unused should be two words. Fix it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

treewide: Add missing includes ...

Many files in the tree implement functions, but do not include the
header files which provide the prototypes for these functions. This
means conflicting prototypes remain undetected. Add the missing
includes.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

treewide: Make locally used functions static ...

Many functions are only used locally but still are globally visible.
Make these function static. Avoids warnings generated with -Wmissing-prototypes

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: imx-esdhc: resolve conflicting flags ...

With commit 3354adee3920 ("mci: imx-esdhc: Add bigendian register access
support") and commit 15b64fd520c2 ("mci: imx-esdhc: Add layerscape support")
two ESDHC_FLAGs got assigned to already existing values. This conflict made
the imx6sl usdhc appear to be big endian.
Resolve this conflict by assign the new flags to the next vacant values.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: imx-esdhc-pbl: initialize is_be ...

Initialize is_be, otherwise the value of is_be is undefined.
So it is possible that the i.MX8 will not boot because the bigendian
functions are used.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

drivers: video: Fix parsing oftree timings ...

This patch fixes the parsing of the display timings options if
the range is specified (min/typ/max). Also fixed the double
release of memory in case of failure.

barebox 2018.12.0-00341-g23b28d33a-dirty #6 Fri Mar 15 09:20:25 MSK 2019

Board: Mega-Milas Informer i.MX6
detected i.MX6 Quad revision 1.2
i.MX reset reason POR (SRSR: 0x00000001)
mdio_bus: miibus0: probed
eth0: got preset MAC address: 50:2d:f4:07:71:0b
nand: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd3 (Samsung NAND 1GiB 3,3V 8-bit), 1024MiB, page size: 2048, OOB size: 64
Bad block table found at page 524224, version 0x01
Bad block table found at page 524160, version 0x01
m25p80 flash@00: n25q128a13 (16384 Kbytes)
imx-usb 2184000.usb@2184000: USB EHCI 1.00
imx-usb 2184200.usb@2184200: USB EHCI 1.00
imx-esdhc 2198000.usdhc@2198000: registered as mmc2
imx-ipuv3 2400000.ipu@2400000: IPUv3H probed
ERROR: /ldb/lvds-channel@0/display-timings/PH320240T: illegal timing specification in clock-frequency
ERROR: /ldb/lvds-channel@0/display-timings/PH320240T: error reading timing properties
ERROR: /ldb/lvds-channel@0: error in timing 1
ERROR: unable to handle NULL pointer dereference at address 0x00000013
pc : [<4fe05742>]    lr : [<4fe05849>]
sp : 4ffefa80  ip : ffffffff  fp : 2fefe84c
r10: 2ff656e8  r9 : 0000002c  r8 : 2ff19630
r7 : 00000000  r6 : 0000004c  r5 : 2ff65960  r4 : 00000007
r3 : 00000013  r2 : 00000000  r1 : 4fe87584  r0 : 2fefb460
Flags: nzcv  IRQs off  FIQs off  Mode SVC_32
[<4fe05742>] (remove_free_block+0xe/0x3e) from [<4fe05849>] (block_locate_free+0x7f/0x88)
[<4fe05849>] (block_locate_free+0x7f/0x88) from [<4fe0599b>] (tlsf_malloc+0x17/0x32)
[<4fe0599b>] (tlsf_malloc+0x17/0x32) from [<4fe0559b>] (malloc+0x13/0x24)
[<4fe0559b>] (malloc+0x13/0x24) from [<4fe3a1f3>] (strdup+0x11/0x22)
[<4fe3a1f3>] (strdup+0x11/0x22) from [<4fe006f3>] (pr_puts+0x33/0x84)
[<4fe006f3>] (pr_puts+0x33/0x84) from [<4fe00803>] (dev_printf+0x6f/0x8c)
[<4fe00803>] (dev_printf+0x6f/0x8c) from [<00000000>] (0x0)

[<4fe54715>] (unwind_backtrace+0x1/0x60) from [<4fe00de1>] (panic+0x1d/0x34)
[<4fe00de1>] (panic+0x1d/0x34) from [<4fe5285d>] (do_exception+0xd/0x10)
[<4fe5285d>] (do_exception+0xd/0x10) from [<4fe528bd>] (do_data_abort+0x21/0x2c)
[<4fe528bd>] (do_data_abort+0x21/0x2c) from [<4fe524d4>] (do_abort_6+0x48/0x54)
 ### ERROR ### Please RESET the board ###

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

usb: dwc3: Toggle GCTL.CORESOFTRESET as a first step ...

Toggle GCTL.CORESOFTRESET before trying to access any of the block's
registers. Without this additional step, first read of DWC3_GHWPARAMS*
that follows results in assertion of GSTS.CSRTIMEOUT and IP block
stuck in a non-functional state.

Note that all above has only been observerd on i.MX8MQ (ZII Zest
board) for USB1 controller. USB2 doesn't seem to be affected by this.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: add ZynqMP clock driver ...

The ZynqMP has a platform management unit (PMU) that is responsible for
managing the clocks. Therefore, the clock driver uses the firmware
driver to control the clocks.

The Barebox driver is based on the Linux driver, but contains deviations
to make the driver more readable and more consistent.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

of: populate "/firmware" while populating device tree ...

The sub-nodes of "/firmware" are not populated, since it has no
"compatible" property. Copy the behavior of Linux and call
of_platform_populate() on the "/firmware" node to probe firmware
drivers.

Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: Add Layerscape clk support ...

This adds support for the clock controller found on Layerscape
SoCs. This is mostly an adoption of the corresponding Linux
driver. This is tested on the LS1046a SoC. Other ARM based Layerscape
SoCs should work aswell, support for the PowerPC based SoCs has
been removed.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ddr: fsl: Add Freescale ddr driver ...

This adds the Freescale ddr driver used on various PowerPC and
Layerscape SoCs. This is based on U-Boot-2019.01 but with many
adjustments:

- PowerPC support has been removed
- CPP #ifdeffery replaced with C
- No more global variables/functions expected from the driver,
  configuration is passed by the board code which calls the driver

We already have the driver in the tree in an older version forked from
U-Boot-2013.04. This version lacks Layerscape support and many quirks
in the driver are PowerPC specific. Since the existing driver should
work on all known PowerPC and PowerPC is a dead end I decided not to
improve the existing driver and instead add a new Layerscape specific
driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i2c: i.MX: Add layerscape support ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

watchdog: imx: Add big endian register access support ...

Layerscape SoCs feature the same watchdog as the i.MX SoCs, but in big
endian mode. Add support for it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

watchdog: imx: Add register accessor functions ...

In preparation of adding big endian support in the next step.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

esdhc-xload: Add support for Layerscape ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: Add Freescale FMan ethernet support ...

This adds ethernet support for the Freecale Layerscape SoCs. The
architecture in these SoCs is called "Data Path Acceleration
Architecture" (DPAA). It is comprised of:

- The Queue Manager (QMan)
- Buffer Manager (BMan)
- Frame Manager (FMan)
- Multirate Ethernet Media Access Controller (mEMAC)

The code is based on the corresponding U-Boot driver enriched with
device tree parsing and proper device driver support.

Tested on LS1046a, should work on other SoCs aswell with some minor
quirks. SerDes support has been removed for now.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: imx-esdhc: Actually enable cache snooping ...

15b64fd520 introduced the ESDHC_FLAG_CACHE_SNOOPING for layerscape
support, but didn't actually set it for layerscape. Add the new
flag to the layerscape SoC data.

Fixes: 15b64fd520 ("mci: imx-esdhc: Add layerscape support")

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

realtek phy driver ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

net: phy: Add register access helper functions for phys ...

Linux has phy helpers to access paged registers and to modify phy
registers. Add them to barebox for upcoming realtek phy support.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>