Merge branch 'for-master/imx-external-nand'

ARM: i.MX: external NAND boot: Fix passing boarddata ...

We used to pass a device tree pointer to
imx*_barebox_boot_nand_external(). This no longer works since we compile
barebox with -fPIE.

The problem is that we only have the first 2KiB of the image available
when we start from NAND. The pointer to the device tree is not valid
yet. This hasn't been a problem because the pointer is only used later
when we have the full image in SDRAM. With -fPIE though the actual
pointer is derived indirectly through another pointer, and that pointer
to the pointer is also not valid which causes an invalid pointer to
the device tree later.

This is solved by splitting the NAND boot functions up into two
functions. With imx*_nand_relocate_to_sdram() the board code relocates
the image out of the NFC SRAM into SDRAM. From that point on the device
tree pointer can be accessed and the board can load the image using
imx*_nand_load_image() and can afterwards pass control to barebox
passing whatever device tee pointer it likes.

Fixes: b0348d677b ("ARM: Compile with -fPIE")
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: external NAND boot: Leave icache disabled ...

It seems running from the NFC SRAM doesn't work with the instruction
cache enabled, it leads to corruptions on the i.MX27. We stumbled upon
this earlier and the solution at that time was to disable the
instruction cache in the NAND boot code. It is, however, more reliable
to just not enable the instruction cache in the first place.
This is not particularly nice as we have to ifdef this in generic code,
duplicate arm_cpu_lowlevel_init(), or call arm_cpu_lowlevel_init() later
when we are out of NFC SRAM. From the different bad solutions I chose
to ifdef the instruction cache away. It will be enabled later in the
common cache functions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: external NAND boot: remove unnecessary arguments from imx*_nand_load_image ...

The imx*_nand_load_image functions all take dest, size, nfc_base and
pagesize_2k arguments. All of these can be determined inside the functions,
so remove them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: stm32mp: align barebox dtsi name with upstream ...

Upstream has split stm32mp157c.dtsi into three files:

- stm32mp157.dtsi: GPU, DSI and stm32mp153.dtsi
- stm32mp153.dtsi: 2x CAN, 2nd Cortex-A7 and stm32mp151.dtsi
- stm32mp151.dtsi: everything else

Have our barebox specific fixup file follow the new naming scheme.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX Phytec phycore i.MX27: replace __naked with noinline ...

phytec_phycore_imx27_common_init() doesn't need to be __naked, because
the stack has already been setup. What we want to have though is the
noinline attribute to make sure phytec_phycore_imx27_common_init() is
indeed a separate function which is called with initialized stack.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX Phytec phycard i.MX27: replace __naked with noinline ...

phytec_phycard_imx27_common_init() doesn't need to be __naked, because
the stack has already been setup. What we want to have though is the
noinline attribute to make sure phytec_phycard_imx27_common_init() is
indeed a separate function which is called with initialized stack.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX Phytec phycard i.MX27: get fdt in common init function ...

No need to get the fdt pointer in the entry functions, we can do this
later.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: scb9328: Add missing machine protection ...

Make sure scb9328_devices_init() is only executed on the correct
machine.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/optee'

Merge branch 'for-next/misc'

Merge branch 'for-next/imx'

Merge branch 'for-next/dts'

dts: update to v5.6-rc1 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: stm32mp: dk2: barebox_set_model to shorter name ...

The full "STMicroelectronics STM32MP157C-DK2 Discovery Board" is a tad
too long. Abbreviate it to STM32MP157C-DK2 instead.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

sandbox: hostfile: fix UB-inducing shift ...

On 32-bit hosts, UBSan reports:

====================================================================
UBSAN: Undefined behaviour in ./arch/sandbox/board/hostfile.c:135:12
shift exponent 32 is too large for 32-bit type 'long unsigned int'
====================================================================

Fix this by using a unsigned long long for base. The upper 32-bit
won't be set, but device tree fixups can now read them.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

sandbox: fix signed integer overflow ...

On a 32-bit host system, UBSan reports:

===============================================================
UBSAN: Undefined behaviour in ./arch/sandbox/os/common.c:115:32
signed integer overflow:
83598 * 1000000000 cannot be represented in type 'long int'
===============================================================

Fix this.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images: Use separate LDFLAGS for PBL ...

When setting CONFIG_PBL_RELOCATABLE=y (selected by PBL_MULTI_IMAGES) and
CONFIG_RELOCATABLE=n (trying to reduce image size), the PBL is also
linked with "-static" instead of "-pie". The result is a non-working
PBL.

As a side effect, also get rid of erroneous "-Map barebox.map" when
linking the PBL.

Only changed for ARM, are any other platforms affected?

Signed-off-by: Christian Eggers <ceggers@arri.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phyCORE-i.MX8M SOM: add pmic initialisation for power good ...

This patch is adding the same PMIC handling as the u-boot spl does for
this Board. It ensures sane defaults.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

regulator: pfuze: add support to other architectures ...

Currently the pfuze driver is build dependent to ARCH_IMX6. To make it
possible to work with ARCH_IMX8 we move the imx6_poweroff call to an own
poweroff handler.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

RISC-V: unbreak built-in dtb ...

The commit c5d38e92010174 ("lds: Add and use RO_DATA_SECTION macro")
consolidates all RO sections link script declaration in the single
RO_DATA_SECTION macro. So all all individual RO section declarations
have to be removed from per-arch linker scripts.

Alas the BAREBOX_CLK_TABLE and the BAREBOX_DTB link script sections
were not removed from RISC-V linker script making these sections
declared twice. As a result incorrect __clk_of_table_start and
__dtb_start addresses are passed to the barebox code therefore
the RISC-V barebox is completely unusable.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: don't overlay relocation data with BSS ...

.bss __rel_start (OVERLAY) was used to optimize RAM size used by
barebox. Since .bss and __rel_start overlap, we should clear bss only
after __rel_start was used. Following patch changed initialization
sequence to clear .bss before __rel_start:
1e5aef61fc6a444 ("MIPS: reloc: init bss and cpu")

This make relocation buffer unusable and broke relocation with different
symptoms reported by Antony Pavlov <antonynpavlov@gmail.com>:
  * iomem output has no information on sdram regions, so memtest is unusable;
  * pc = 0xa081232c, relocation does not work, barebox is located with 8M offset
    from start of RAM. The board has 256M and relocation routine
    should move barebox code much higher;
  * pc = 0xa081232c, so barebox code works from KSEG1 not from KSEG0 as MMU=y option implies.

There is a choice of moving .bss clear sequence after __rel_start or
remove this optimization. Since the use of this optimization is minimal
and danger to trap in to similar issue is still high, i prefer to remove
this optimization.

As result of this change, we need to fix calculation of relocation are
size:
relocate_code() calculates relocation area size as a sum (barebox_image_size +
bss_len). barebox_image_size and bss_len are calculated as (__image_end -
__image_start) and (__bss_stop - __bss_start) respectively. This doesn't take
into account relocation data placed between  __image_end and __bss_start.
However relocation preserves BSS position relative to image start, as if
relocation data is still there. This causes RAM overflow during BSS
initialization in main_entry(). This problem may be hidden due to the alignment
of the `relocaddr`.

Reported-by: Antony Pavlov <antonynpavlov@gmail.com>
Fixes: 1e5aef61fc6a444 ("MIPS: reloc: init bss and cpu")
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mach-imx: test PL310 write access ...

If OP-TEE early loading is performed, OP-TEE will configure the PL210
and lock write access to the controller from the normal world. Test this
by trying to write the same value back and do not configure if we can
not write to the PL310.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: add optee early loading function ...

Add a OP-TEE early loading function which expects a pointer to a valid
tee binary and the device tree. OP-TEE will then be started and barebox
will continue to run in normal mode.

The function start_optee_early should be used in a boards lowlevel.c
file. Ensure that barebox has been relocated and a proper c environment
has been setup beforehand. Depending on the OP-TEE configuration, the
fdt will be modified. If the internal barebox device tree is passed,
OP-TEE will overwrite barebox PBL memory during this modification. Copy
the fdt to a save memory location beforehand to avoid a corruption of
barebox PBL memory.

This also moves the OP-TEE Kconfig symbols into a separate menu.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: import setjmp implementation from U-Boot ...

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

optee: move optee_verify_header() to common ...

Subsequent patches will use this to verify the header in the PBL, move
it to common to make it potentially available for both.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6: properly check for IPU presence ...

Since a73850bd76d0 (ARM: imx: disable IPU QoS setup for correct SoCs), which
fixed the condition to not execute the IPU QoS fixups on SoCs that don't have
a IPU, the fixups aren't applied on i.MX6Q/DP anymore, since those SoCs were
missing from the whitelist.

Add a function to make it a bit more clearer what we are checking here and add
the Q/DP SoCs.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

imx25: drop global over-current setting for USB ...

There is no mx25 board in mainline that actually uses USB. My
(out-of-tree) board has active low polarity which makes it necessary to
have

	/delete-property/ over-current-active-high;
	over-current-active-low;

in the board's dts which is ugly.

In the absence of this property Linux defaults to active-high and
encourages explicit configuration (see commit 1bf4743f641d ("usb:
chipidea: imx: Warn if oc polarity isn't specified")), so other external
board dts files likely already have this setting anyhow. (OK, maybe a
bit optimistic here :-)

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: actually use CONFIG_MIPS_RELOCATION_TABLE_SIZE ...

The commit 28ed10d6a67c9 ("MIPS: relocation: add relocation support")
introduce the Kconfig CONFIG_MIPS_RELOCATION_TABLE_SIZE parameter
but it is never used.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: qemu-virt64: convert to assembly entry ...

The C entry function isn't naked, so tries to push to the stack
in the function prologue. This doesn't work on QEMU where there
is no valid SP on entry. Convert the lowlevel entry to the
assembly facilities provided for this case.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>